Modified:
        README.md -- Added notes for workdays.
        Engine_Layer_Proposal.graphml -- Added updates to reflect changing ideas about rx engine. Some updates will be undone in the next commit
        trellis.vh -- Removed 128-bit `defines, as they were deemed unnecessary with the new shiftreg approach

deleted:
        rx_enabler.v -- Replaced with rxc_enabler.v & rxr_enabler, each of which instantiates a

Added:
       rxr_enabler.v -- rxr specific logic for enabling output registers
       rxc_enabler.v -- rxc specific logic for enabling output registers
       rxc_engine.v -- rxc specific logic for the rx engine
       rxr_engine.v -- rxr specific logic for the rx engine