Add error recovery when elaboration of a type range fails.

If elaboration of the msb or lsb expression in the range of a vector
type specification failed (due to an error in the Verilog code being
compiled), an assertion failure was being triggered when the compiler
attempted to evaluate the expressions. Bypassing the evaluation (and
using a default value) should allow us to recover from the error.
Fix for br961 - function return type elaborated in wrong scope.

The return type of a function should be elaborated in the context of
the enclosing scope, not in the context of the function itself.
Update cppcheck suppression file for tgt-vlog.
When comparing that an enumeration is in range cast the value to 2-state

When checking that an enumeration value is in range we need to cast it to
a 2-state value so that when we compare it we get a true or false value
instead of an undefined value. Undefined bits in the comparison return
undefined which is not logically false.
Check enum trimmed bits for values with undefined bits

If an enumeration constant has undefined bits then we need to verify that
the bits that are trimmed match the MSB of the remaining bits.
Fix null pointer dereference in pform debug output.
Reinstate error recovery for range expressions.

If an error is found whilst elaborating a range expression in a signal
declaration, create a dummy range and continue elaboration. This stops
the compiler reporting an error every time that signal is referenced.
Pass the integer type for enumerations to the IVL target stage
Merge branch 'master' of github.com:steveicarus/iverilog
Catch enumerations with the same name.
Don't crash if there are problems elaborating an enumeration.
Merge branch 'master' into vec4-stack

Conflicts:
	elab_scope.cc