sub & mult supported
Merge pull request #18 from fakhreldin-m-abdelkhalik/CU

sub & mult supported
multiply added
Merge pull request #20 from fakhreldin-m-abdelkhalik/M_ALU

multiply added
remove txt file not needed
Merge pull request #21 from fakhreldin-m-abdelkhalik/adjustments

remove txt file not needed
Rename folder and change readmem from hex to binary
Add Array copy assembly code , binary isntructions , data and testbench
Add Array sum assembly code , binary isntructions , data and testbench
Add Swap assembly code , binary isntructions and testbench
Add Remainder assembly code , binary isntructions and testbench
Add Odd decrement assembly code , binary isntructions and testbench
Add Concatenation assembly code , binary isntructions and testbench
Add Division assembly code , binary isntructions and testbench
Add Fibonacci assembly code  binary isntructions
Add initial value to stack pointer to point to the last memory place
Merge pull request #23 from fakhreldin-m-abdelkhalik/fakhreldin_stack_pointer

Add initial value to stack pointer to point to the last memory place
fix a bug
fix a bug
Merge branch 'master' of https://github.com/fakhreldin-m-abdelkhalik/Verilog-Mips into Programs