PR libstdc++/58764 (again)
	* include/bits/stl_list.h (list): Make default constructor's exception
	specification conditional.
	* include/bits/stl_vector.h (vector): Likewise.
	* testsuite/util/testsuite_allocator.h (SimpleAllocator): Add noexcept
	to default constructor.
	* testsuite/23_containers/list/requirements/dr438/assign_neg.cc:
	Adjust dg-error line number.
	* testsuite/23_containers/list/requirements/dr438/constructor_1_neg.cc:
	Likewise.
	* testsuite/23_containers/list/requirements/dr438/constructor_2_neg.cc:
	Likewise.
	* testsuite/23_containers/list/requirements/dr438/insert_neg.cc:
	Likewise.
	* testsuite/23_containers/vector/requirements/dr438/assign_neg.cc:
	Likewise.
	* testsuite/23_containers/vector/requirements/dr438/
	constructor_1_neg.cc: Likewise.
	* testsuite/23_containers/vector/requirements/dr438/
	constructor_2_neg.cc: Likewise.
	* testsuite/23_containers/vector/requirements/dr438/insert_neg.cc:
	Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206946 138bc75d-0d04-0410-961f-82ee72b054a4
	* config/i386/x86-tune.def (X86_TUNE_ACCUMULATE_OUTGOING_ARGS):
	Enable for generic and recent AMD targets.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206947 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206950 138bc75d-0d04-0410-961f-82ee72b054a4
2014-01-22  David Holsgrove <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze.md: Correct bswaphi2 insn.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206952 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	PR target/52125
	* rtl.h (get_referenced_operands): Declare.
	* recog.c (get_referenced_operands): New function.
	* config/mips/mips.c (mips_reorg_process_insns): Check which asm
	operands have been referenced when recording LO_SUM references.

gcc/testsuite/
	PR target/52125
	* gcc.dg/pr48774.c: Remove skip for mips_rel.
	* gcc.target/mips/pr52125.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206955 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
        * config/i386/avx512fintrin.h (_mm512_loadu_si512): Rename.
        (_mm512_storeu_si512): Ditto.

testsuite/gcc/
        * gcc.target/i386/avx512f-vmovdqu32-1.c: Fix intrinsic name.
        * gcc.target/i386/avx512f-vmovdqu32-2.c: Ditto.
        * gcc.target/i386/avx512f-vpcmpd-2.c: Ditto.
        * gcc.target/i386/avx512f-vpcmpq-2.c: Ditto.
        * gcc.target/i386/avx512f-vpcmpud-2.c: Ditto.
        * gcc.target/i386/avx512f-vpcmpuq-2.c: Ditto.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206956 138bc75d-0d04-0410-961f-82ee72b054a4
PR preprocessor/58580 - preprocessor goes OOM with warning for zero literals

In this problem report, the compiler is fed a (bogus) translation unit
in which some literals contain bytes whose value is zero.  The
preprocessor detects that and proceeds to emit diagnostics for that
king of bogus literals.  But then when the diagnostics machinery
re-reads the input file again to display the bogus literals with a
caret, it attempts to calculate the length of each of the lines it got
using fgets.  The line length calculation is done using strlen.  But
that doesn't work well when the content of the line can have several
zero bytes.  The result is that the read_line never sees the end of
the line because strlen repeatedly reports that the line ends before
the end-of-line character; so read_line thinks its buffer for reading
the line is too small; it thus increases the buffer, leading to a huge
memory consumption and disaster.

Here is what this patch does.

location_get_source_line is modified to return the length of a source
line that can now contain bytes with zero value.
diagnostic_show_locus() is then modified to consider that a line can
have characters of value zero, and so just shows a white space when
instructed to display one of these characters.

Additionally location_get_source_line is modified to avoid re-reading
each and every line from the beginning of the file until it reaches
the line number N that it is instructed to get; this was leading to
annoying quadratic behaviour when reading adjacent lines near the end
of (big) files.  So a cache is now associated to the file opened in
text mode.  When the content of the file is read, that content is
stashed in the file cache.  That file cache is searched for line
delimiters.  A number of line positions are saved in the cache and a
number of file caches are kept in memory.  That way when
location_get_source_line is asked to read line N + 1, it just has to
start reading from line N that it has already read.

libcpp/ChangeLog:

	* include/line-map.h (linemap_get_file_highest_location): Declare
	new function.
	* line-map.c (linemap_get_file_highest_location): Define it.

gcc/ChangeLog:

	* input.h (location_get_source_line): Take an additional line_size
	parameter.
	(void diagnostics_file_cache_fini): Declare new function.
	* input.c (struct fcache): New type.
	(fcache_tab_size, fcache_buffer_size, fcache_line_record_size):
	New static constants.
	(diagnostic_file_cache_init, total_lines_num)
	(lookup_file_in_cache_tab, evicted_cache_tab_entry)
	(add_file_to_cache_tab, lookup_or_add_file_to_cache_tab)
	(needs_read, needs_grow, maybe_grow, read_data, maybe_read_data)
	(get_next_line, read_next_line, goto_next_line, read_line_num):
	New static function definitions.
	(diagnostic_file_cache_fini): New function.
	(location_get_source_line): Take an additional output line_len
	parameter.  Re-write using lookup_or_add_file_to_cache_tab and
	read_line_num.
	* diagnostic.c (diagnostic_finish): Call
	diagnostic_file_cache_fini.
	(adjust_line): Take an additional input parameter for the length
	of the line, rather than calculating it with strlen.
	(diagnostic_show_locus): Adjust the use of
	location_get_source_line and adjust_line with respect to their new
	signature.  While displaying a line now, do not stop at the first
	null byte.  Rather, display the zero byte as a space and keep
	going until we reach the size of the line.
	* Makefile.in: Add vec.o to OBJS-libcommon

gcc/testsuite/ChangeLog:

	* c-c++-common/cpp/warning-zero-in-literals-1.c: New test file.

Signed-off-by: Dodji Seketeli <dodji@seketeli.org>

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206957 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* config/i386/avx512fintrin.h (_mm512_kmov): New.
	* config/i386/i386.c (IX86_BUILTIN_KMOV16): Ditto.
	(__builtin_ia32_kmov16): Ditto.
	* config/i386/i386.md (UNSPEC_KMOV): New.
	(kmovw): Ditto.

testsuite/gcc/
	* gcc.target/i386/avx512f-kmovw-1.c: New.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206958 138bc75d-0d04-0410-961f-82ee72b054a4
	* doc/xml/faq.xml (a-how_to_set_paths): Expand FAQ answer.
	* doc/xml/manual/abi.xml (abi.versioning.history): Correct symver.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206960 138bc75d-0d04-0410-961f-82ee72b054a4
2014-01-23  Dominique Dhumieres  <dominiq@lps.ens.fr>

        PR sanitizer/59897
        * c-c++-common/asan/use-after-return-1.c: Fixed
        to pass on darwin.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206961 138bc75d-0d04-0410-961f-82ee72b054a4
	PR middle-end/58809
	* c-typeck.c (c_finish_omp_clause): Reject MIN_EXPR, MAX_EXPR,
	BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR on COMPLEX_TYPEs.

	* semantics.c (finish_omp_reduction_clause): Reject
	BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR on COMPLEX_TYPEs.

	* c-c++-common/gomp/pr58809.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206962 138bc75d-0d04-0410-961f-82ee72b054a4
2014-01-23  Yury Gribov  <y.gribov@samsung.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/57316
	* configure.ac: Check for missing syscalls.
	* Makefile.am: Likewise.
	* configure: Regenerate.
	* Makefile.in: Regenerate.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206966 138bc75d-0d04-0410-961f-82ee72b054a4
2014-01-23  David Holsgrove <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze.md: Add trap insn and attribute



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206967 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64_BE 1/4] Big-Endian lane numbering fix

[gcc/]
2014-01-23  Alex Velenko  <Alex.Velenko@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_be_ld1<mode>):
	New define_insn.
	(aarch64_be_st1<mode>): Likewise.
	(aarch_ld1<VALL:mode>): Define_expand modified.
	(aarch_st1<VALL:mode>): Likewise.
	* config/aarch64/aarch64.md (UNSPEC_LD1): New unspec definition.
	(UNSPEC_ST1): Likewise.

[gcc/testsuite/]
2014-01-23  Alex Velenko  <Alex.Velenko@arm.com>

	* gcc.target/aarch64/vld1-vst1_1.c: New test_case.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206968 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64_BE 2/4] Big-Endian lane numbering fix

2013-01-23  Alex Velenko  <Alex.Velenko@arm.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_be_checked_get_lane<mode>): New define_expand.
	* config/aarch64/aarch64-simd-builtins.def
	(BUILTIN_VALL (GETLANE, be_checked_get_lane, 0):
	New builtin definition.
	* config/aarch64/arm_neon.h: (__aarch64_vget_lane_any):
	Use new safe be builtin.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206970 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64_BE 3/4] Big-Endian lane numbering fix

2014-01-23  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_dup_lane<mode>): Correct lane number on big-endian.
	(aarch64_dup_lane_<vswap_widthi_name><mode>): Likewise.
	(*aarch64_mul3_elt<mode>): Likewise.
	(*aarch64_mul3_elt<vswap_width_name><mode>): Likewise.
	(*aarch64_mul3_elt_to_64v2df): Likewise.
	(*aarch64_mla_elt<mode>): Likewise.
	(*aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_mls_elt<mode>): Likewise.
	(*aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_fma4_elt<mode>): Likewise.
	(*aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_fma4_elt_to_64v2df): Likewise.
	(*aarch64_fnma4_elt<mode>): Likewise.
	(*aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_fnma4_elt_to_64v2df): Likewise.
	(aarch64_sq<r>dmulh_lane<mode>): Likewise.
	(aarch64_sq<r>dmulh_laneq<mode>): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise.
	(aarch64_sqdmull_lane<mode>_internal): Likewise.
	(aarch64_sqdmull2_lane<mode>_internal): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206972 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64_BE 4/4] Big-Endian lane numbering fix

2014-01-23  James Greenhalgh  <james.greenhalgh@arm.com>
	    Alex Velenko  <Alex.Velenko@arm.com>

	* config/aarch64/arm_neon.h (vaddv_s8): __LANE0 cleanup.
	(vaddv_s16): Likewise.
	(vaddv_s32): Likewise.
	(vaddv_u8): Likewise.
	(vaddv_u16): Likewise.
	(vaddv_u32): Likewise.
	(vaddvq_s8): Likewise.
	(vaddvq_s16): Likewise.
	(vaddvq_s32): Likewise.
	(vaddvq_s64): Likewise.
	(vaddvq_u8): Likewise.
	(vaddvq_u16): Likewise.
	(vaddvq_u32): Likewise.
	(vaddvq_u64): Likewise.
	(vaddv_f32): Likewise.
	(vaddvq_f32): Likewise.
	(vaddvq_f64): Likewise.
	(vmaxv_f32): Likewise.
	(vmaxv_s8): Likewise.
	(vmaxv_s16): Likewise.
	(vmaxv_s32): Likewise.
	(vmaxv_u8): Likewise.
	(vmaxv_u16): Likewise.
	(vmaxv_u32): Likewise.
	(vmaxvq_f32): Likewise.
	(vmaxvq_f64): Likewise.
	(vmaxvq_s8): Likewise.
	(vmaxvq_s16): Likewise.
	(vmaxvq_s32): Likewise.
	(vmaxvq_u8): Likewise.
	(vmaxvq_u16): Likewise.
	(vmaxvq_u32): Likewise.
	(vmaxnmv_f32): Likewise.
	(vmaxnmvq_f32): Likewise.
	(vmaxnmvq_f64): Likewise.
	(vminv_f32): Likewise.
	(vminv_s8): Likewise.
	(vminv_s16): Likewise.
	(vminv_s32): Likewise.
	(vminv_u8): Likewise.
	(vminv_u16): Likewise.
	(vminv_u32): Likewise.
	(vminvq_f32): Likewise.
	(vminvq_f64): Likewise.
	(vminvq_s8): Likewise.
	(vminvq_s16): Likewise.
	(vminvq_s32): Likewise.
	(vminvq_u8): Likewise.
	(vminvq_u16): Likewise.
	(vminvq_u32): Likewise.
	(vminnmv_f32): Likewise.
	(vminnmvq_f32): Likewise.
	(vminnmvq_f64): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206973 138bc75d-0d04-0410-961f-82ee72b054a4
Added support for Cilk Plus SIMD-enabled functions for C++.
gcc/c/c-parser.c
2014-01-23  Balaji V. Iyer  <balaji.v.iyer@intel.com>

        * c-parser.c (c_finish_omp_declare_simd): Made "cilk simd function"
        attribute an attribute without value.

gcc/cp/ChangeLog
2014-01-23  Balaji V. Iyer  <balaji.v.iyer@intel.com>

        * parser.c (cp_parser_direct_declarator): When Cilk Plus is enabled
        see if there is an attribute after function decl.  If so, then
        parse them now.
        (cp_parser_late_return_type_opt): Handle parsing of Cilk Plus SIMD
        enabled function late parsing.
        (cp_parser_gnu_attribute_list): Parse all the tokens for the vector
        attribute for a SIMD-enabled function.
        (cp_parser_omp_all_clauses): Skip parsing to the end of pragma when
        the function is used by SIMD-enabled function (indicated by NULL
        pragma token).   Added 3 new clauses: PRAGMA_CILK_CLAUSE_MASK,
        PRAGMA_CILK_CLAUSE_NOMASK and PRAGMA_CILK_CLAUSE_VECTORLENGTH
        (cp_parser_cilk_simd_vectorlength): Modified this function to handle
        vectorlength clause in SIMD-enabled function and #pragma SIMD's
        vectorlength clause.  Added a new bool parameter to differentiate
        between the two.
        (cp_parser_cilk_simd_fn_vector_attrs): New function.
        (is_cilkplus_vector_p): Likewise.
        (cp_parser_late_parsing_elem_fn_info): Likewise.
        (cp_parser_omp_clause_name): Added a check for "mask", "nomask"
        and "vectorlength" clauses when Cilk Plus is enabled.
        (cp_parser_omp_clause_linear): Added a new parameter of type bool
        and emit a sorry message when step size is a parameter.
        * parser.h (cp_parser::cilk_simd_fn_info): New field.
        * decl.c (grokfndecl): Added flag_enable_cilkplus along with
        flag_openmp.
        * pt.c (apply_late_template_attributes): Likewise.

testsuite/ChangeLog
2014-01-23  Balaji V. Iyer  <balaji.v.iyer@intel.com>

        * g++.dg/cilk-plus/cilk-plus.exp: Called the C/C++ common tests for
        SIMD enabled function.
        * g++.dg/cilk-plus/ef_test.C: New test.
        * c-c++-common/cilk-plus/ef_error3.c: Made certain messages C specific
        and added C++ ones.
        * c-c++-common/cilk-plus/vlength_errors.c: Added new dg-error tags
        to differenciate C error messages from C++ ones.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206975 138bc75d-0d04-0410-961f-82ee72b054a4
	* config/msp430/msp430.h (ASM_SPEC): Pass the -mcpu as -mcpu.
	(LIB_SPEC): Drop use of memory.ld and peripherals.ld scripts in
	favour of mcu specific scripts.
	* config/msp430/t-msp430 (MULTILIB_MATCHES): Add more matches for
	430x multilibs.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206977 138bc75d-0d04-0410-961f-82ee72b054a4
[PATCH][AArch64] Vector shift by 64 fix

gcc/

	* config/aarch64/aarch64-simd-builtins.def (ashr): DI mode removed.
	(ashr_simd): New builtin handling DI mode.
	* config/aarch64/aarch64-simd.md (aarch64_ashr_simddi): New pattern.
	(aarch64_sshr_simddi): New match pattern.
	* config/aarch64/arm_neon.h (vshr_n_s32): Builtin call modified.
	(vshrd_n_s64): Likewise.
	* config/aarch64/predicates.md (aarch64_shift_imm64_di): New predicate.

gcc/testsuite/

	* gcc.target/aarch64/sshr64_1.c: New testcase.




git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206978 138bc75d-0d04-0410-961f-82ee72b054a4