ARM: orion5x: fix target ID for crypto SRAM window

In commit 4ca2c04085a1caa903e92a5fc0da25362150aac2 ('ARM: orion5x:
Move to ID based window creation'), the mach-orion5x code was changed
to use the new mvebu-mbus API. However, in the process, a mistake was
made on the crypto SRAM window target ID: it should have been 0x9
(verified in the datasheet) and not 0x0.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: stable@vger.kernel.org
---
This should be backported to stable all the way to v3.12.
pinctrl: mvebu: new driver for Orion platforms

This commit extends the pinctrl mvebu logic with a new driver to cover
Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281
variants of Orion5x, which are the three ones supported by the old
style MPP code in arch/arm/mach-orion5x/.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
clk: mvebu: add Orion5x clock driver

This commit adds a core clock driver for the Orion5x SoC, with support
for the tclk, the CPU frequency and the DDR frequency. All the details
about the Sample-At-Reset register were extracted from the U-Boot
sources for Orion5x.

Note that Orion5x does not have gatable clocks, so this core clock
driver is sufficient to support clocking on Orion5x platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
memory: mvebu-devbus: fix the conversion of the bus width

According to the Armada 370 and Armada XP datasheets, the part of the
Device Bus register that configure the bus width should contain 0 for
a 8 bits bus width, and 1 for a 16 bits bus width (other values are
unsupported/reserved).

However, the current conversion done in the driver to convert from a
bus width in bits to the value expected by the register leads to
setting the register to 1 for a 8 bits bus, and 2 for a 16 bits bus.

This commit fixes that by adjusting the conversion logic.

This patch fixes a bug that was introduced in
3edad321b1bd2e6c8b5f38146c115c8982438f06 ('drivers: memory: Introduce
Marvell EBU Device Bus driver'), which was merged in v3.11.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: stable@vger.kernel.org
memory: mvebu-devbus: use ARMADA_ prefix in defines

The mvebu-devbus driver currently only supports the Armada 370/XP
family, but it can also cover the Orion5x family. However, the Orion5x
family has a different organization of the register. Therefore, in
preparation to the introduction of Orion5x support, we rename the
Armada 370/XP specific definitions to have an ARMADA_ prefix.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
memory: mvebu-devbus: split functions

The mvebu-devbus driver currently only supports the Armada 370/XP
family, but it can also cover the Orion5x family. However, the Orion5x
family has a different organization of the registers.

Therefore, in preparation to the introduction of Orion5x support, we
separate into two functions the code that 1/ retrieves the timing
parameters from the Device Tree and 2/ applies those timings
parameters into the hardware registers.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
memory: mvebu-devbus: add Orion5x support

This commit adds support for the Orion5x family of Marvell processors
into the mvebu-devbus driver. It differs from the already supported
Armada 370/XP by:

 * Having a single register (instead of two) for doing all the timing
   configuration.

 * Having a few less timing configuration parameters.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: move interrupt controller node into ocp

The interrupt controller node was located outside of the ocp@f1000000
node, which doesn't make much sense: like any other device, the
interrupt controller has registers located in the "Internal Registers
Window", so it is much more logical to have it under the ocp@f1000000
node.

It is even more important as we are going to move Orion5x to use the
Device Tree binding of the mvebu-mbus driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: switch to preprocessor includes in DT

This commit switches the Orion5x Device Tree files to use C
preprocessor based includes, as it will allow us to use definitions
from header files in future commits.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: use existing dt-bindings include for Device Tree files

The orion5x-lacie-ethernet-disk-mini-v2.dts can benefit from using
gpio.h and input.h dt-bindings headers to replace hardcoded values by
more meaningful macros.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: convert DT to use the mvebu-mbus driver

This commit switches the Orion5x Device Tree files to use the DT
representation and probing for the mvebu-mbus driver. The changes are
mainly:

 * Re-organize the DT to follow the same organization as the one used
   on Armada 370/XP, which is needed for mvebu-mbus to work: a
   top-level soc { ... } node, which corresponds to the MBus bus, and
   a sub-node internal-regs { ... } for all peripherals whose register
   sit only in the "Internal Register Window". This change re-indents
   by one level the definition of all nodes in the Device Tree, which
   explains the large change.

 * Use custom functions orion5x_dt_init_early() and
   orion5x_dt_init_time() instead of orion5x_init_early() and
   orion5x_timer_init() as we now want the MBus driver to be probed
   from the Device Tree. We still use the old-style timer
   initialization, but that will be changed in a followup commit.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: add interrupt for Ethernet in Device Tree

For some reason, the Ethernet interrupt was missing in the Orion5x
Device Tree definition.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: switch to use the clock driver for DT platforms

This commit moves the Orion5x platforms using the Device Tree to use
the recently introduced clock driver for Orion5x. To achieve that, it:

 * Adds the necessary DT description of the clock.

 * Selects ORION_CLK to enable the compilation of the clock driver.

 * Call of_clk_init() instead of the Orion5x-specific clock
   initialization function.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion: switch to a per-platform handle_irq() function

Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
enabled, even for non-DT platforms (if we want both DT and non-DT
platforms to be supported in a single kernel).

However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
platforms in plat-orion/irq.c doesn't match the needs of
Orion5x. Also, it doesn't make much sense for orion_irq_init() to
register the multi-IRQ handler: orion_irq_init() is called once for
each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
be registered once.

To solve this problem, we move the multi-IRQ handle in per-platform
code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
will be introduced in a followup commit. Of course, this code will
ultimately be completely removed once all boards are converted to the
Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: switch to DT interrupts and timer

This commit switches the Orion5x platforms described through DT to use
a DT-defined interrupt controller and timer.

This involves:

 * Describing in the DT the bridge interrupt controller, which is a
   child interrupt controller to the main one, which is used for timer
   and watchdog interrupts.

 * Describing in the DT the timer.

 * Adding in the DT the interrupt specifications for the watchdog.

 * Selecting the ORION_IRQCHIP and ORION_TIMER drivers to be compiled.

 * Change the timer initialization in board-dt.c to use
   clocksource_of_init().

 * Implement a multi-IRQ handler for non-DT platforms in
   mach-orion5x/irq.c.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: enable pinctrl driver at SoC level

This commit declares the pinctrl device in the Orion5x 5182 Device
Tree files, and ensures that the Orion pinctrl driver is compiled.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: update I2C description at SoC level

This commit fixes the Orion5x SoC definition to:

 * Not define a clock-frequency, as it should be described on a
   per-board basis.

 * Declare the appropriate clock reference, so that the driver can do
   correct divisors calculations for the I2C bus.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: add Device Bus description at SoC level

This commit adds the necessary SoC-level Device Tree definitions to
describe the Device Bus of Orion5x SOCs. The Device Bus is mainly used
to connect NOR flashes to the system.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: add standard pinctrl configs for sata0 and sata1

Several platforms will most likely use similar pinctrl configurations
for SATA0 and SATA1, so we declare those common configurations in the
Orion5x DT file.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
ARM: orion5x: convert edmini_v2 to DT pinctrl

This commit converts the already partially DT-converted edmini_v2
platform to use the Device Tree for pinctrl.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>