Revert "msm: mdp: Change msmfb kworker to kthread"

This reverts commit 8ea77e5d1f47f98041b17e4e082a230bb19d8392.
Revert "Fixup merge."

This reverts commit bae339864158464da51ea49223a161ddafa89edc.
Revert "msm: display: command mode panel release fence"

This reverts commit 15cce4657afd8024e5850f618ef3147b1e64da3f.
Revert "msm: display: Revert Oppo changes to mdp4_overlay_dsi_cmd"

This reverts commit 3dcd0fcf1d1461775638cd88c0cdfa48954d39e3.
Revert "display: enable TE vsync function"

This reverts commit 36bf06d00a9c9a8a175ffaf59b6336b402688170.
msm_fb: Set timeline threshold for command mode to 2

For command mode panel, timeline threshold is 1 and we return
commit ioctl on DMA_P interrupt. This causes fps to drop
since sometimes overlay is kickoff just after vsync interrupt
causing DMA_P wait time more than 1 vsync period. Hence, increase
timeline to 2 and return commit ioctl on vsync interrupt.

CRs-fixed: 457153
CRs-fixed: 452269
Change-Id: Ic7385631fdeb25f269306d284c94fdf43cade3d1
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
display: flo: enable TE vsync function

1. Enable TE vsync function in gpio config.
   Note that pinfo.lcd.refx100 need to be align with TE frequency in panel.
2. add lcd vertical porches to have correct value of MDP register 0x100
   and 0x210
3. remove the mfd->ibuf.vsync_enable in condition to have correct value of
   MDP register 0x20c

case 01186196
Bug: 8767597

Change-Id: Ie8c3021d447c255c811ca95bf71ec4cfb2949b6f
Signed-off-by: yetta_wu <yetta_wu@asus.com>
video: n1: reduce dsi pll lock times

Setting dsi pll ctrl reg 16 and 17 to optimal values to reduce lock
time from 8ms to less than 1ms.

Reference commit: https://github.com/TeamEOS/kernel_asus_flo/commit/f55a6b5bb1c59afc7a0d3045233558d6659c25ce
msm: mdp: Do not wait for vsync for command mode panel

wait4vsync is not necessary since pipe commit has already a busy
wait
for the previous frame play done.

Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
msm: mdp: Disable early suspend only for the MDP driver

Early suspend is deprecated in the framework but disabling it
completely can affect other subsystems. Disabling only for the
MDP driver.

Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
msm: mdp: Disable early suspend locally

undefing at the header level could mess with other components.

Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
msm: display: command mode panel release fence

For command mode panel, release fence should be signaled after the buffer is
sent to the panel.  For performance consideration, allow one more commit to be
queued.  Keep the second kick off as short as enough.

Change-Id: I19af075ebf480d3e81b46b1cd2ef21a2893f143e
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Signed-off-by: Iliyan Malchev <malchev@google.com>
msm: mdp: Change msmfb kworker to kthread

This worker can be a longer running task depending on the number
of frames queued, hence change it to a thread.

Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Change-Id: Iebf7e95d0486ac43aa6a12d70442936600c0249a
msm: mdp: Update sync pt. behaviour

Add a retire fence and clean up the existing release fence
implementation

Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Change-Id: Iecf7e95d0786ac43aa6a12d70442936600c0249a
msm: mdp: Unmap secure memory on dtv off

Signed-off-by: naseer <naseer@codeaurora.org>
msm: mdp: Free secure memory based on pipe config

When there is no secure pipe configured, we can unmap secure
memory instead of relying on unset with secure flag set from
userspace.

Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
mdp: flo: Set minimum IB value for 4 layers

For 4 layer MDP composition, if the total composed area
doesn't cover the whole screen, there is a potential hole
in our calculation where we don't request enough bandwidth
especially for larger displays such as flo.
Pin the minimum bandwidth to ~1.6G (empirical) to fix this.

[NOTE] Adding this for N1 too, since we also have a pretty
       large display with many pixels to push.

Bug: 10954796
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp4_overlay.c
mach-msm: n1: remove duplicate code
video: find5: reduce dsi pll lock times
Setting dsi pll ctrl reg 16 and 17 to optimal values to reduce lock
time from 8ms to less than 1ms.

Reference commit: TeamEOS/kernel_asus_flo@f55a6b5

Change-Id: Ibe71390c0f5806f155f6bf9b2687b695b773ca05
display: find5: enable TE vsync function
1. Enable TE vsync function in gpio config.
   Note that pinfo.lcd.refx100 need to be align with TE frequency in panel.
2. add lcd vertical porches to have correct value of MDP register 0x100
   and 0x210
3. remove the mfd->ibuf.vsync_enable in condition to have correct value of
   MDP register 0x20c

case 01186196
Bug: 8767597

Change-Id: Ie8c3021d447c255c811ca95bf71ec4cfb2949b6f
Signed-off-by: yetta_wu <yetta_wu@asus.com>

Note: without mfd->ibuf.vsync_enable