genlib/fifo: add flush, expose level in SyncFIFO

AsyncFIFO would need versions of flush and level in each clock domain
plus some handshaking on double flush.

Signed-off-by: Robert Jordens <jordens@gmail.com>
util/misc: add masked_equality address comparison factory function
bus/csr: new simulation api
genlib/coding: gracefully handle flen(i) < 2