gallivm: fix idiv

ffeb77c7b0552a8624e46e65d6347240ac5ae84d had a typo which turned all signed
integer divisions into unsigned ones. Oops.
This gets us back the 51 little piglits
(all from glsl built-in-functions, fs/vs/gs-op-div-int-ivec2 and similar).

Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
(cherry picked from commit 5e1fcc625824ae962d5f658e151e6bc2665adce8)
egl/drm: expose KHR_image_pixmap extension

This changes enables EGL_KHR_image_pixmap in the egl drm platform, which is implemented
there but has not been advertised yet.

Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 53b614bfd3c12368347b2953121e815add68d90b)
i915: Fix black buffers when importing prime fds

Width and Height of the imported image was never initialized from the
imported bo.

Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit df341320c9be34c40b76e42510640120e0ebe0d3)
radeonsi: release GS rings at context destruction

Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 711623f7c8113d43f2d54ebfe5cbed3d406a3c79)
[Emil Velikov: s/ring/ring.buffer/]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
radeonsi: properly destroy the GS copy shader and scratch_bo for compute

Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit dc05a9e4e089d66a2ffe8919857ad9660e108c28)
[Emil Velikov: remove unref scratch_bo, s/si_shader/si_pipe_shader/]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
mesa: Use proper structure for glGet*(GL_TEXTURE_COORD_ARRAY*).

The code in get.c that handles this uses ctx->Array.VAO->VertexAttrib,
which is a gl_vertex_attrib_array structure, not a gl_client_array.

The offsets of all fields happened to be the same in both structures, at
least on x86_64.  "Size," "Type," and "Stride" are obviously the same:
both structures start with the same fields, in the same order.

"Enabled" is dicier: there are different fields before it in both
structures, including pointer sized values which might need special
alignment.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit d0ec6e85099af68b8a36f9815f4e3d43d767bb38)
mesa: Set correct array element in vbo_exec_vtx_init.

I'm not familiar with this code, but this sure appears to be a typo.
It looks like the intent is to set each array element, not arrays[0]
each time.  Notably, the loop just below uses "array", not "arrays".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit f81052dc9b99eca765a44decd01af0335350d0b2)
nv50/ir: avoid deleting pseudo instructions too early

What happens is that a SPLIT operation is part of the spill node, and as
a pseudo op, the instruction gets erased after processing its first def.
However the later defs still need to refer to it, so instead delay
deleting until after that whole RA node is done processing.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79462
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0147c10c5f00b43696ba660aab604d674a75e83c)
gm107/ir: fix manual TXD for array targets

This parallels the fixes in commit afea9bae.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d3c3bba6d07c97cfc1499a6bda73337584943971)
gm107/ir: fix texture argument order

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 0532a5fd00cdddda0fd1727fb519cb4312f47e83)
gm107/ir: add support for indirect const buffer selection

This was missed in the commit that enabled it for fermi/kepler as part
of ARB_gpu_shader5

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit cdc4de121564a47cbdac760622b6dc7112e548aa)
gm107/ir: take relative pfetch offset into account

There is no dedicated instruction for this, so just combine it with the
constant offset.

Acked-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a5bbfeda977a62aa3349f0c7d04c5c20156c1faf)
st/mesa: Use PIPE_USAGE_STAGING for GL_STATIC/DYNAMIC/STREAM_READ buffers

Such buffers can only be useful by reading from them with the CPU, so we
need to make sure CPU reads are fast.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84178
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 7e55c3b352b6616fa2780f683dd6c8e1a3f61815)
glsl: Make sure fields after small structs have correct padding

Previously the linker would correctly calculate the layout, but the
lower_ubo_reference pass would not apply correct alignment to fields
following small (less than 16-byte) nested structures.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83533
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 8e01c66da6c780601f941aa5b9939962c219fdbd)
glsl: Make sure row-major array-of-structure get correct layout

Whether or not the field is row-major (because it might be a bvec2 or
something) does not affect the array itself.  We need to know whether an
array element in its entirety is row-major.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83506
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 5c75270c344815b15ef73e83421192fd7de35972)
glsl: Round struct size up to at least 16 bytes

Per rule #9, the size of the structure is vec4 aligned.  The MAX2 in the
loop ensures that sizes >= 16 bytes are vec4 aligned.  The new MAX2
after the loop ensures that sizes < 16 bytes are vec4 aligned.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82932
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 2ab71e1486e76722154b48faef8216ff8173fd30)
glsl: Strip arrayness from ir_type_dereference_variable too

If the thing being dereferenced is a record or an array of records, it
should be treated as row-major.  The ir_type_derference_record path
already does this, and I think I intended to do the same for this path
in b17a4d5d.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83741
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c3f17bb18f597d7f606805ae94363dae7fd51582)
configure.ac: Compute LLVM_VERSION_PATCH using llvm-config

This is the only guaranteed way get the patch level for llvm,
since the define cannot always be found in config.h depending
on the version of llvm or the build system used.

CC: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
(cherry picked from commit ec566e0f169dac33814463e913e5d844a782c61e)
st/dri: remove GALLIUM_MSAA and __GL_FSAA_MODE environment variables

Some users don't understand that these variables can break OpenGL.
The general is rule is that if an app supports MSAA, you mustn't use
GALLIUM_MSAA.

For example, if an app has an 8xMSAA FBO and GALLIUM_MSAA=4
is set, resolving the FBO to the back buffer will be rejected which will look
like this on all gallium drivers:

http://www.phoronix.com/scan.php?page=article&item=amd_radeonsi_msaa

The environment variables also have no effect on modern apps like TF2, but
there is still a performance hit due to wasted bandwidth and VRAM.

In a nutshell, it does more harm than good.

Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 8449121971ce1db03fea19665d314e523fdc10dd)