tcg-ppc64: Support mulsh_i32

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Merge ppc32 shifts

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Remove the backend

Vectoring the 32-bit build to the ppc64 directory.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Rename the tcg/ppc64 backend

The other tcg backends that support 32- and 64-bit modes
use the 32-bit name for the port.  Follow suit.

Signed-off-by: Richard Henderson <rth@twiddle.net>
qemu/osdep: Remove the need for qemu_init_auxval

Instead of getting backup auxv data from the env pointer given to main,
read it from /proc/self/auxv.  We can do this at any time, so we're not
tied to any ordering wrt a call to qemu_init_auxval from main.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Merge cache-utils into the backend

As a "utility", it only supported ppc, and in a way that other
tcg backends provided directly in tcg-target.h.  Removing this
disparity is easier now that the two ppc backends are merged.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Use the return address as a base pointer

This can significantly reduce code size for generation of (some)
64-bit constants.  With the side effect that we know for a fact
that exit_tb can use the register to good effect.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc: Streamline USE_DIRECT_JUMP

With the TCG_REG_RA base, we can form any 2G displacement for 64-bit,
which means we only need 4 insns for the 64-bit target instead of 7.

Generate the mtctr and brctr insns once during translation and not
part of ppc_tb_set_jmp_target.  This means we can update only 2 insns,
and we can arrange to do that update atomically.

Signed-off-by: Richard Henderson <rth@twiddle.net>