ARM: Enable two errata that Novena requires

This enables two L2 cache (PL310) errata that are present in Novena.
ARM: export L2 cache handles (for Vivante driver)

These cache functions aren't exported by default when only a single
platform is built.  So export them manually.
ARM: dts: novena: Add FPGA as a SPI device

The FPGA is bootstrapped over SPI, so put it there.