ARM: dts: honami: enable clearpad pen input

Change-Id: I324d45d66f6d211b321a568186f95ad9af09908a
amami : add cm_rhine_amami_row_defconfig

Change-Id: I1ad3830a056a5f40aa423ef194dbe70f59296b21
ion: system_heap: only use low gfp flags for order-0 pages

By trying a little harder to get high-order pages (by virtue of the
liberal gfp flags used for high-order allocations) we can actually
optimize performance since high-order pages seem to help a lot. Only use
the low-order flags as a last resort, when trying to allocate an order-0
page.

Change-Id: If8d8f4b1b4503b0c7546cf5a4bcdcaecd2bb5905
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
msm: lpm_levels: remove rpm handshake in l2_gdhs mode

Remove rpm handshake in l2_gdhs mode and adjust the
latency values for l2_gdhs mode. Add a new dt entry to
inform lpm_levels driver to send sleep votes to rpm.

CRs-fixed: 604873
Change-Id: I9eeae5fada4f84ee2ca2eb9d67707dee1adf56ac
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/msm8226-v1-pm.dtsi
msm: lpm_levels: return new idle level to cpuidle framework

Need to return the new idle level to cpuidle framework
but just returned input value argument 'index' which is
not used actually at lpm_cpu_power_select().

CRs-fixed: 601636
Change-Id: Iabd182eeb4fbdc67f4e07b40a1b593471cf8cbdf
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
PM / devfreq: Fix out of bounds access of transition table array

The previous_freq value for a device could be an invalid frequency that
results in a error value being returned from devfreq_get_freq_level().
Check for an error value before using that to index into the transition
table.

Not doing this check will result in memory corruption when previous_freq is
not a valid frequency.

Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Change-Id: Ia9f9f3dabf14b26c4dff54fb2bac3e77f33458c0
msm: pm: print active clocks before entering into pc

print out all active clocks during idle power collapse
and suspend power collapse using clock debug API

CRs-fixed: 596828
Change-Id: Ie653c02d490b80de001f61fe8320ee851bb139c7
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: pm: bug in pc debug counters logic

The logic to find the location to add debug counter
for a CPU is incorrect and due to this the counter
of next CPU is corrupted. The logic is updated to
correct this.

CRs-fixed: 596773
Change-Id: I6de21bd480720d80ad9801d8a1331b6faf689b95
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: mdss: synchronize wfd driver iommu mmap/munmap with mdss

Add clocks reference during wfd driver iommu mdp_mmap/mdp_munmap
to ensure iommu is in proper state while wfd driver map/un-map
any buffers.

Change-Id: Id1a24285b81d5047e5e9f002ade9694ea49be59d
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
msm: mdss: add bus bandwidth request enable/disable during get/free buffer

Enable bus bandwidth request during get/free buffer to ensure
iommu is in proper state while mapping/un-mapping any buffers.

Change-Id: I85cc74a666dbfd29abd26609cbdd3e968d1ecd01
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
msm: mdss: Decimation and BWC cannot be enabled together

Hardware cannot support decimation and bwc together.
The use case should be failed.

Change-Id: Ic7547340eb08d542a296aa9cfdd150e7eb0bea4b
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@quicinc.com>
msm: mdss: optimize MDP pipes cleanup

There are cases where pipe cleanup can happen without display commit.
This means that the pipe was never programmed to hardware, in these
cases the pipe can be cleaned up without the need of display commit
cycle to happen. Also there is no need to access hardware to release
resources such as SMPs since they have not been programmed yet.

Change-Id: I57a46471dc1fba4e45e55c3543940ba4fba0540a
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
ARM: dts: msm: lower LDO 11 minimum voltage constraint for msm8974

Change the minimum voltage constraint of PM8941 LDO 11 from 1.3 V
to 1.225 V.  This allows the RPM to reduce the voltage of LDO 11
when no consumers on the application processor require it to be
at the maximum level of 1.3 V.  This is particularly important
when a consumer on another processor needs LDO 11 to be enabled
but no consumer on the application processor requires the same.

Make the same change for PMA8084 LDO 11 on msm8974pro boards.

Change-Id: I9cf71cf7d9360c045af1ac51a3994e3f6d672191
CRs-Fixed: 614000
Signed-off-by: David Collins <collinsd@codeaurora.org>
Revert "msm: clock-8974: Reduce PLL lock time"

This reverts commit 4506a7feeaf02d272c518783cdac680bbd8aa312.