+ MIPS: support floating point conditions in its emulated flags, on MIPS4+ convert such flags to registers using conditional move instructions (i.e. without branching). For older cores generated code remains the same.


git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@28535 3ad0048d-3df7-0310-abae-a5850022a9f2
+ MIPS: implemented more peephole optimizations.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@28536 3ad0048d-3df7-0310-abae-a5850022a9f2