capture01: Add include of assert.h.
Enhance Semaphore Blocking and Readying Time Test Cases

tm02 and tm03 were modified to be reused for multiple configurations
of RTEMS Classic API Semaphores. This added tm31-36.  The messages for
tm02 and tm03 were modified to indicate the semaphore attributes.
tm31 - tm36 were added. This resulted in the following cases:

tm02 - rtems_semaphore_obtain: Counting/FIFO not available caller blocks
tm03 - rtems_semaphore_release: Counting/FIFO task readied preempts caller
tm31 - rtems_semaphore_obtain: Counting/priority not available caller blocks
tm32 - rtems_semaphore_release: Counting/priority task readied preempts caller
tm33 - rtems_semaphore_obtain: Binary/FIFO not available caller blocks
tm34 - rtems_semaphore_release: Binary/FIFO task readied preempts caller
tm35 - rtems_semaphore_obtain: Binary/priority not available caller blocks
tm36 - rtems_semaphore_release: Binary/priority task readied preempts caller
semdelete.c: Correct spacing
scheduleredfunblock.c: Correct spacing
sp59: Fix typos
uart-output-char.h: extra offset definition.

All,

This patch is submitted as its values are used in my to-be-submitted
beagle bsp.
rbtree: Delete unused functions
rbtree: Reduce RBTree_Control size

Remove compare function and is unique indicator from the control
structure.  Rename RBTree_Compare_function to RBTree_Compare.  Rename
rtems_rbtree_compare_function to rtems_rbtree_compare.  Provide C++
compatible initializers.  Add compare function and is unique indicator
to _RBTree_Find(), _RBTree_Insert(), rtems_rbtree_find() and
rtems_rbtree_insert().  Remove _RBTree_Is_unique() and
rtems_rbtree_is_unique().  Remove compare function and is unique
indicator from _RBTree_Initialize_empty() and
rtems_rbtree_initialize_empty().
Thread Queue Priority Discipline Reimplemented with RBTree
Thread Queue: Merge discipline subroutines into main methods

There was a lot of duplication between the discipline subroutines.
With the transition to RBTrees for priority discipline, there were
only a few lines of source code manipulating the data structure
for FIFO and priority. Thus is made sense to fold these back
into the main methods.

As part of doing this all of the tests for discipline were changed
to be in the same order.
Use Shared Method for Thread Unblock Cleanup

When a thread is removed from a thread queue or is unblocked
by receiving an event, the same actions are required.

 + timeout watchdog canceled,
 + thread must be unblocked, and
 + (MP only) proxy cleaned up

This patch makes sure there is only one copy of this code.
Common ARM A8 code.
Add More Testsuite Configuration Files and Update Existing Ones

The first pass at building these was without networking enabled.
This pass addresses that plus accounts for some new BSPs which
needed testsuite.tcfg files and BSPs which could not link tests
which had been added since the first pass.
m68k/gen68360/include/tm27.h: Correct comment
Added BeagleBoard BSP

Coding done in course of GSoC2012.

Commit edited to be brought up-to-date with mainline by
Ben Gras <beng@shrike-systems.com>.
BSP for several Beagle products

Specifically the beagleboard, beagleboard xM, beaglebone, beaglebone black.

More info on these targets: http://www.beagleboard.org/

    This commit forms a basic BSP by combining Claas's work with
        . new clock and irq code and definitions for
          beagle targets (beagleboard and beaglebones), mostly
          reused from the Minix codebase, thus making
          irqs, ticks and non-polled console mode work too
        . new timer code for ns timing with high timer resolution,
          24MHz on the AM335X and 13MHz on the DM37XX
        . select the console uart based on target at configure time
        . removing all the lpc32xx-specific macros and code and
          other unused code and definitions that the beagle bsp
          was based on
        . re-using some standard functions instead of lpc32xx versions
        . fixed some whitespace problem in preinstall.am
        . fixed some compile warnings
        . configure MMU: set 1MB sections directly in the TTBR,
	  just to show the difference between cacheable RAM and
	  non-cacheable device memory and invalid ranges; this lets us
	  turn on caches and not rely on boot loader MMU configuration.
	  Verified to work when MMU is initially either on or off when
	  RTEMS gets control.

    Signed-Off-By: Ben Gras <beng@shrike-systems.com>