mtd: nand: define struct nand_timings

Define a struct containing the standard NAND timings as described in NAND
datasheets.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: add ONFI timing mode to nand_timings converter

Add a converter to retrieve NAND timings from an ONFI NAND timing mode.
At the moment, only SDR NAND timings are supported.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: support ONFI timing mode retrieval for non-ONFI NANDs

Add an onfi_timing_mode_ds field to nand_chip and nand_flash_dev in order
to support NAND timings definition for non-ONFI NAND.

NAND that support better timings mode than the default one have to define
a new entry in the nand_ids table.

The timings mode should be deduced from timings description from the
datasheet and the ONFI specification
(www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf, chapter 4.15
"Timing Parameters").
You should choose the closest mode that fit the timings requirements of
your NAND chip.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add Hynix's H27UCG8T2ATR-BC to nand_ids table

Add the full description of the Hynix H27UCG8T2ATR-BC NAND chip in the
nand_ids table so that we can later use the NAND ECC infos and ONFI timings
mode in controller drivers.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add sunxi NAND flash controller support

Add support for the sunxi NAND Flash Controller (NFC).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add sunxi NFC dt bindings doc

Add the sunxi NAND Flash Controller dt bindings documentation.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
ARM: dt/sunxi: add NAND controller pin definitions

Define the NAND controller pin configs.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
ARM: dt/sunxi: add NFC node to Allwinner A20 SoC

Add NAND Flash controller node definition to the A20 SoC.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
ARM: sunxi/dt: enable NAND on cubietruck board

Enable the NFC and describe the NAND flash connected to this controller.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: take nand_ecc_ctrl initialization out of nand_scan_tail

Take ECC initialization code portion out of nand_scan_tail so that we can
re-use this implementation.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add support for NAND partitions

Add support for NAND partitions, and inderectly for per partition ECC
config.
Provide helper functions to add/delete/allocate nand partitions.
NAND core code now make use of the partition specific nand_ecc_ctrl struct
(if available) when doing read/write operations.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add DT NAND partition parser

Add ofnandpart_parse function to help parsing NAND partitions from DT.
This function should be called from NAND controller drivers just after the
nand_scan_tail in place of mtd_device_parse_register.
The caller can specify a parser function to retrieve HW specific
informations from  the DT.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add NAND partition support to the sunxi driver

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add page status table (pst)

Page status table is an byte array storing pages status.
It defines 3 status:
 - unknown: the page has not been read yet and we do not know its current
   state
 - empty: the page contains only FFs
 - filled: the page has been filled with data

Care must be taken: an empty page does not mean it can be written, because
it might have already been written with only FFs.

These page status are useful to check wether the controller should try to
correct errors (using ECC) or a derandomize data (using a randomizer
block).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: introduce a randomizer layer in the NAND framework

This patch introduce a new layer in the NAND framework to support both HW
and SW randomizers.

This randomization is required on some MLC/TLC NAND chips which do not
support large islands of same patterns.

The randomizer layer defines a nand_rnd_ctrl struct which is intended to
be used by NAND core functions or NAND drivers to randomize/derandomize
data stored on NAND chips.

The implementation can implement any of these functions:
- config: prepare a random transfer to/from the NAND chip
- write_buf: randomize and write data to the NAND chip
- read_buf: read and derandomize data from the NAND chip

read/write_buf functions are always called after a config call.
The config call specify the page, the column within the page and the action
that will take place after the config (either read or write).
If column is set to -1, the randomizer is disabled.
If page is set to -1, we keep working on the same page.

The randomizer layer provides helper functions that choose wether the
randomizer or the chip read/write_buf should be used.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
of: mtd: add NAND randomizer mode retrieval

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add sunxi randomizer support

Add support for the HW randomizer available in the sunxi IP.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
ARM: sunxi/dt: add cubietruck NAND partitions

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
mtd: nand: add manufacturer specific init code infrastructure

Add new fields in nand_manufacturers and nand_chip struct to provide
manufacturer specific handling like read retries.

Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
mtd: nand: add hynix specific initializer

Add an hynix initiliazer to manage read retries on h27uxgt8t2a chip.

Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com>