egl/drm: do not crash when swapping buffers without any rendering

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
i965/fs: Use instruction execution sizes when generating scratch reads/writes

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
i965/fs: Don't [un]spill multiple registers at a time in SIMD8 mode

I thought this would be a clever way to make spilling less expensive.
However, it appears that the oword read/write messages we are using for
spilling ignore the execution size and assume SIMD16 whenever working with
more than one register.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
i965: Use the spill destination for the message header on GEN >= 7

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
i965/fs: Use correct spill offsets

Different platforms require the offset to be in different units.  However,
the generator fixes all of this up for us and only requires an offset in
bytes.  Previously, we were getting this wrong all over the place.  Some
computed/used it correctly as bytes while others treated the offset as
whole registers or computed it as bytes or bytes*2 in SIMD16 mode.  This
commit cleans all this up and makes us properly treat it as bytes
everywhere.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
i965/fs: Make scratch write instructions use the correct execution size

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
i965/fs: Don't set dependency hints on instructions with spilled destinations

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>