Update FFT core

Changed bram latency to 4 to fix timing errors
Added simple_spec and boffiles

Compiled for 4GSa clock
"Working" compiles of single baseline designs

Compiled against hdl_xeng_testing branch (NOT MASTER AS THE MODEL
LOGS SAY) commit 63f252c5847fb5d4c65e4a00f84fd71c00dc24a4

ADCs calibrating OK
Merge branch 'master' of https://github.com/jack-h/ami_correlator