ran DRC and corrected INJ1/2 and IGN2 labels
Corrected LSD1 & LSD2
Swapped IGN1 & IGN2 outputs

ins and outs on U5 had only been partially transposed from A to B in had
been swapped from the original master schematic but Outs were still
original
Changed INJ3/4 to Inj1HS and Inj2HS labels

Labels on input side of U6 corrected to reflect purpose all the way back
to MCU. Original Master had MCU matching reference design until final
connection at U6. SL logically followed and corrected final step :) but
actual intention now clarified - also option net at output stage IGN3&4
to P7
add junctions and correct NCs on Inputs page

multiple junctions required by DRC
corrected NoConnect pins from unspecified on U10
Corrected labels for 5v and B+ on P4 - SBC sheet

also added junctions where DRC identified unconnected components on SBC
and Inputs