clk: ti: change clock init to use generic of_clk_init

Previously, the TI clock driver initialized all the clocks hierarchically
under each separate clock provider node. Now, each clock that requires
IO access will instead check their parent node to find out which IO range
to use.

This patch allows the TI clock driver to use a few new features provided
by the generic of_clk_init, and also allows registration of clock nodes
outside the clock hierarchy (for example, any external clocks.)

This patch also effectively reverts cf345a4e7213d0a662683591dcec6779832da67e
as the retry mechanism for clockdomain init is no longer needed.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Jyri Sarha <jsarha@ti.com>
Tested-by: Jyri Sarha <jsarha@ti.com>
clk: ti: fix clk_init retry logic with generic of_clk_init use

Adding support for using generic of_clk_init caused an issue with retrying
clock init, in such way that retry init was never attempted for failed
clocks. Fixed by exporting the retry init call into its own driver API,
and calling this after of_clk_init from low level IO init.

Fixes: e80e55ebbf2856614 ("clk: ti: change clock init to use generic of_clk_init")
Reported-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
clk: ti: set CLK_SET_RATE_NO_REPARENT for ti,mux-clock

[ Upstream commit 7d5fc85d961b807c799786afd175f5d964a2109f ]

When setting the rate of a clock, by default the clock framework will
change the parent of the clock to the most suitable one in
__clk_mux_determine_rate() (most suitable by looking at the clock rate).

This is a rather dangerous default, and causes problems on AM43x when
using display and ethernet. There are multiple ways to select the clock
muxes on AM43x, and some of those clock paths have the same source
clocks for display and ethernet. When changing the clock rate for the
display subsystem, the clock framework decides to change the display mux
from the dedicated display PLL to a shared PLL which is used by the
ethernet, and then changes the rate of the shared PLL, breaking the
ethernet.

As I don't think there ever is a case where we want the clock framework
to automatically change the parent clock of a clock mux, this patch sets
the CLK_SET_RATE_NO_REPARENT for all ti,mux-clocks.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
ARM: DTS: dra7-evm: Rename mmc2_3v3 regulator to the board level power name

mmc2_3v3 is derived from the board level evm_3v3_sw power line and other
components are using the same line for their power needs.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
ARM: DTS: dra72-evm: Rename mmc2_3v3 regulator to the board level power name

The power line feeding the SD card is also used by other devices on the EVM.
Use generic name instead of mmc2_3v3 so when other devices want to use the
same regulator it will look a bit better.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>