[Arm] Various cleanups to the Arm assembler backend.

A couple of cleanups to the Arm backend to enable support of extended
OOL constant pools in a following CL.

 - Remove instruction pattern extern const's and replace their use with IsXXX()
   functions.
 - Do calculation of the target address of a load from constant pool in one
   place.
 - A couple of other small cleanups.

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/317653003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21932 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Run JS micro tasks in the appropriate context.

R=jochen@chromium.org
BUG=385349
LOG=Y

Review URL: https://codereview.chromium.org/332923003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21933 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Special case ConstantPoolArray in MarkCompactCollector::MigrateObject.

Special case the ConstantPoolArray in MarkCompactCollector::MigrateObject since it could contain
integer value entires which look like tagged pointers.

R=hpayer@chromium.org, mstarzinger@chromium.org

Review URL: https://codereview.chromium.org/304223002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21934 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
[Arm]: Simplify compile-time Arm feature detection.

Simplify the compile time feature detection on Arm:
 - Define CAN_USE_XXX definitions unconditionally for all target/host
   toolchain combinations
 - Rename arm_test / ARM_TEST to arm_test_noprob / ARM_TEST_NO_FEATURE_PROBE
 - Don't set ARM_TEST_NO_FEATURE_PROBE implicitly on the simulator to make
   make simulator / native more consistent
 - Unify CpuFeatures::PrintTarget for simulator and native builds
 - Remove unecessary CAN_USE_VFP_INSTRUCTIONS definition for android (this is
   the default for arm_fpu=default)
 - Add a CpuFeatures::Probe() before calling CpuFeatures::PrintFeatures() in PrintHelp
    to ensure we have probed features before printing them.

BUG=384474
LOG=N
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/340373002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21935 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Harden %FunctionBindArguments wrt optimized code cache.

R=jkummerow@chromium.org
BUG=387627
LOG=N

Review URL: https://codereview.chromium.org/345463005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21936 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Support LiveEdit on Arm64

BUG=368580
LOG=Y
R=yangguo@chromium.org

Review URL: https://codereview.chromium.org/339663007

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21937 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Partial revert of r21901 (2nd attempt)

Only disable runtime check for sse2 if __SSE2__ is not defined. This
is required for the x87 port

BUG=none
LOG=n
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/331803006

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21938 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Create a RegisterSpec class inside of the IC that provides:
1) symbolic names for the register (like, edx == receiver)
2) can return an array of registers
3) defines ordering when passed on the stack

Code that implements or uses the IC should use this RegisterSpec instead of "knowing" what the registers are. Or at least have the RegisterSpec to validate it's assumptions.

R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/340363002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21939 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Several methods moved from JSObject to Map.

R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/349203002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21940 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Support external startup data in V8.

[Re-retry of r21696 and r21739]

If the embedder chooses, the 'natives' (library sources) and the
precompiled startup blob can be written to files during the build
process and handed over to V8 at startup. The main purpose would be
to reduce the size of the compiled binary for space constrained
platforms.

The build-time option is off by default. Nothing should change if
it's not enabled.

BUG=
R=jochen@chromium.org

Review URL: https://codereview.chromium.org/334913004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21941 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Map::MigrateToMap() now supports fast case (transition from a map that has run out of property space).

R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/347413002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21942 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Revert "Create a RegisterSpec class inside of the IC that provides:"

This reverts commit r21939 due to a static initializer issue.

TBR=marja@chromium.org

Review URL: https://codereview.chromium.org/339663008

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21943 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Add PROJECT to v8

BUG=374398
R=machenbach@chromium.org

Review URL: https://codereview.chromium.org/344163005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21944 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
ARM64: Optimize generated code for gaps

R=ulan@chromium.org, jochen@chromium.org

Review URL: https://codereview.chromium.org/268673003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21945 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
MIPS: Introduce intrinsic to expose debug state to generated code.

Port r21908 (527abba)

BUG=
R=plind44@gmail.com

Review URL: https://codereview.chromium.org/343193005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21946 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Fix #include order in snapshot-external.cc

This corrects a linter complaint.

BUG=
R=mstarzinger@chromium.org, vogelheim@chromium.org

Review URL: https://codereview.chromium.org/351643002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21947 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
MIPS: Fix comment in r21905: "Support LiveEdit."

BUG=
R=plind44@gmail.com

Review URL: https://codereview.chromium.org/345243005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21948 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
ARM: Clean up FlushICache.

In theory, the Thumb version of FlushICache doesn't have to be any
different from the ARM version: There is no need to switch to ARM mode
for the svc, and r7 can be used just like any other register.

In practice, GCC uses r7 as a frame pointer in Thumb code, and it
refuses to allow it be used in inline assembly. To avoid complicated
checks to determine whether or not it is possible to use it directly,
the FlushICache function explicitly preserves r7.

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/335133002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21949 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Map/Set: Implement constructor parameter handling

When an iterable object is passed in as the argument to the Map and Set
constructor the elements of the iterable object are used to populate the
Map and Set.

http://people.mozilla.org/~jorendorff/es6-draft.html#sec-map-iterable
http://people.mozilla.org/~jorendorff/es6-draft.html#sec-set-iterable

BUG=v8:3398
LOG=Y
R=rossberg@chromium.org

Review URL: https://codereview.chromium.org/345613003

Patch from Erik Arvidsson <arv@chromium.org>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21950 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Change some cmpq to cmpp, times_8 to times_pointer_size for x32 port.

R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/334793003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21953 ce2b1a6d-e550-0410-aec6-3dcde31c8c00