msm: msm-pm: Remove timeout waiting for cpu to power collapse

The delays in the CPU_DYING notication path could result in the core
initiating the hotplug to send out CPU_DEAD notifications after
msm_pm_wait_cpu_shutdown() times out. This could result in a unknown
resets when regulator/clocks are disabled in the CPU_DEAD path. To
prevent unknown resets, wait infinitely to enter power collapse but
throw a warning after the 1ms mark.

The platform_cpu_kill() path is also executed in the reboot path when a
core tries to stop secondary cores. In these cases, platform_cpu_kill
shouldn't wait infinitely for the secondary cores to power collapse. To
circumvent this scenario, track dying cpus as a part of the hotplug
notification and skip waiting for the core to power collpase during
reboot path.

Change-Id: I6a7fbeeea0d50b5f1fc76a02a39f161b40a67b6c
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: pm: Notify secure code of L2 power mode from last core only

Notify secure code L2 low power mode only if the current core is the
last core down. In certain scenarios, its possible that Linux and
secure code have different views of what a last core and could result in
secure code not invalidating a cache when the L2 was placed in a
non-retention mode.

Consider a two core scenario where Core 1 is power collapsed and Core 0
is the last core down setting L2 to be invalidated. Before Core 0 makes
the scm call, its possible that is interrupted to process a secure
interrupt. If the Core 1 wakes up in this time and decides to vote a
different L2 mode, this mode wouldn't be consistent with what Core 0
passes down to secure code when resuming from interrupt handling. In
these cases, the secure code could end up incorrectly invalidating the L2
on warmboot.

Also, the secure code and Linux should have a consistent view of what
last core down is to flush and invalidate L2. To ensure this, acquire a
remote (hardware) spinlock to serialize the last portion of the
power-collapse sequence. The remote spinlock will be released by the
secure code after it acquires its own lock to serialize the power
collapse sequence.

Change-Id: Ib5e2f360fddce558d22ce094dd7755c395c45a8c
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: pm: Acquire scm_handoff_lock conditionally

Acquisition of the scm_handoff_lock requires a TrustZone software
image that will release the lock. Without this, a deadlock will
occur since the lock will remain held forever.

Since this lock is only really needed if the qcom,allow-synced-levels
property is specified for the lpm-levels device, conditionally acquire
the lock based on this property. This avoid the TrustZone software
dependency when qcom,allow-synced-levels is not specified.

Change-Id: I8f8f1e4f9bdab6e70ef2a5484faba4e8ce8ac20c
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/msm8974-v2-pm.dtsi

Signed-off-by: renderbroken <zkennedy87@gmail.com>
msm: pm: print active clocks before entering into pc

print out all active clocks during idle power collapse
and suspend power collapse using clock debug API

CRs-fixed: 596828
Change-Id: Ie653c02d490b80de001f61fe8320ee851bb139c7
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: pm: bug in pc debug counters logic

The logic to find the location to add debug counter
for a CPU is incorrect and due to this the counter
of next CPU is corrupted. The logic is updated to
correct this.

CRs-fixed: 596773
Change-Id: I6de21bd480720d80ad9801d8a1331b6faf689b95
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: lpm_levels: update suspend stats counters and time

suspend stats in the debug pm stats are not getting updated as
suspend stats in the suspend wake path is missing. This change
will add and update the suspend stats in the suspend wake path.

CRs-fixed: 536881
Change-Id: I3b47511afb75926e51e82fc83929f405404fbf07
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: pm: Fix cpu collapse timeout

Looks like caf mismerged. This may fix the following warning:

<4>[  124.983957] ------------[ cut here ]------------
<4>[  124.984381] WARNING: at arch/arm/mach-msm/msm-pm.c:837 msm_pm_wait_cpu_shu
tdown+0x9c/0xb0()
<4>[  124.984661] CPU2 didn't collapse in 2 ms
<4>[  124.984869] [<c010e10c>] (unwind_backtrace+0x0/0x144) from [<c0a1c68c>] (d
ump_stack+0x20/0x24)
<4>[  124.985170] [<c0a1c68c>] (dump_stack+0x20/0x24) from [<c019ab44>] (warn_sl
owpath_common+0x58/0x70)
<4>[  124.985464] [<c019ab44>] (warn_slowpath_common+0x58/0x70) from [<c019abd8>
] (warn_slowpath_fmt+0x40/0x48)
<4>[  124.985943] [<c019abd8>] (warn_slowpath_fmt+0x40/0x48) from [<c0179d30>] (
msm_pm_wait_cpu_shutdown+0x9c/0xb0)
<4>[  124.986287] [<c0179d30>] (msm_pm_wait_cpu_shutdown+0x9c/0xb0) from [<c0126
750>] (platform_cpu_kill+0x38/0x48)
<4>[  124.986591] [<c0126750>] (platform_cpu_kill+0x38/0x48) from [<c010c6fc>] (
__cpu_die+0x4c/0x98)
<4>[  124.986778] [<c010c6fc>] (__cpu_die+0x4c/0x98) from [<c09ee9cc>] (_cpu_dow
n+0xf8/0x2e0)
<4>[  124.987074] [<c09ee9cc>] (_cpu_down+0xf8/0x2e0) from [<c09eec58>] (cpu_dow
n+0x34/0x50)
<4>[  124.987383] [<c09eec58>] (cpu_down+0x34/0x50) from [<c0194250>] (cpu_down_
work+0xc4/0xd8)
<4>[  124.987564] [<c0194250>] (cpu_down_work+0xc4/0xd8) from [<c01b4e44>] (proc
ess_one_work+0x178/0x4f4)
<4>[  124.987861] [<c01b4e44>] (process_one_work+0x178/0x4f4) from [<c01b5540>]
(worker_thread+0x174/0x448)
<4>[  124.988152] [<c01b5540>] (worker_thread+0x174/0x448) from [<c01bb8ac>] (kt
hread+0xb4/0xc0)
<4>[  124.988450] [<c01bb8ac>] (kthread+0xb4/0xc0) from [<c0108060>] (kernel_thr
ead_exit+0x0/0x8)
<4>[  124.988725] ---[ end trace 77427e632785e345 ]---
msm: msm-pm: Remove outer cache functions

Remove outer cache functions to do cache maintenance
operations because all the newer targets having the
integrated cache controller and cache operations are
done by standard cache maintenance functions.

[myfluxi: Adapt to 8974/hammerhead]

Change-Id: Iaeaf5bc85ea629b89efabb1d3ea8cc9aa97f9790
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: pm: Remove redundant cpu_init API

cpu_init() API setup the per-CPU stacks after cores
comes out of the low power modes. This API is not
needed after the PM driver start using the standard
ARM suspend/resume framework.

Change-Id: Ic384165e4fbc289c8338c66ebac1bb0d2bfadf8b
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: watchdog-v2: use request_mem_region instead of request_region

Use request_mem_region api to request for allocating io resource in place
of request_region since the resource is actually not an io port resource
but io memory.

Change-Id: Iddb279466495e34aa469dabaa134a209db2e21ea
Signed-off-by: Aparna Das <adas@codeaurora.org>
msm: msm_watchdog_v2: Increase watchdog bark timeout during panic

We now wait for 10 seconds during panic handling before triggerring a
watchdog bark. This is done because the earlier timeout of 4 seconds
was not sufficient for all targets which resulted in the device resetting
in the middle of the panic handler.

Bug: 11293746

Change-Id: I1a45ac2ccf626d93848763fe56bb6ad164c2471d
Signed-off-by: Ameya Thakur <ameyat@codeaurora.org>
(cherry picked from commit c2acf59dc892653e1a67852c5bdb298ed1a09689)
msm: msm_bus: Don't program bw regs in dual config

When in dual configuration mode, don't program the bw registers
since they are already programmed at boot up.

Change-Id: I74d559f997b6374df7b68ffd022aa6d36beb7a9d
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
msm: msm_bus: Arbitrate IB for dual config masters

Arbitrate the IBs on nodes marked as dual config. This will prevent cases
where the last client's requests is always used to apply dual config rules.

Change-Id: I06f9a16e5f32c1cda7a5d04a72a6e5cf7dc9fae6
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
msm: msm_rq_stats: remove is_smp() API

is_smp() API is unavailable on few target codes.
Until this API is defined use CONFIG_SMP to know
whether target supports SPM are not.

CRs-fixed: 579034
Change-Id: I5bd5c208b18aae27d7f36e77e9d5b38639c2c00e
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
arm: msm: add alarm reboot reason

Add alarm reboot reason for power off charging.

Change-Id: If94d0e4a7ec250cfaa61bf578cae9324db05d32c
Signed-off-by: Maria Yu <aiquny@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/restart.c
msm: Remove old unused sdio related code

Cleanup mach-msm by removing unused sdio related code.

Change-Id: I485deb7d6499771294b494f5542ba510c10255cb
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
msm: cpufreq: Avoid NULL clock pointer references

The MSM CPUfreq driver defines a mapping from cpu number to clock
pointer. On SOCs with synchronous cpus, only the mapping for cpu#0
is defined, even though there may be more than 1 cpu. Handle this
case by skipping certain unnecessary initialization steps for SOCs
with synchronous cpus.

Conflicts:
	arch/arm/mach-msm/cpufreq.c

Change-Id: Iaeba7a8615e3cb7da2c725250db92595450bfa46
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: bam_dmux: tune downlink polling parameters

This change disables the BAM DMUX adaptive timer - this is to address
concerns about drops in TCP throughput for some use cases with the timer
enabled.  It also sets the aggregation to 3ms to save power while not
compromising performance. Power tests show a savings of 3-4% (compared to
having the timer poll the BAM pipe every 1 ms) for LTE (40Mbps downlink and
25Mbps uplink) and HSPA (7Mbps downlink and 384Kbps uplink) with no
degradation in performance.

Change-Id: Ia51eae773723e60d8b051766ad80bfb0a16f5f6d
Signed-off-by: Anurag Singh <anursing@codeaurora.org>
msm: bam_dmux: add loopback support

Bam dmux is currently very difficult to isolate and provide measurements
for common metrics, such as throughput and latency.

Add hooks into bam_dmux to allow for a seperate dynamically
loadable loopback module. This allows bam dmux to be isolated, and to
provide more accurate measurements of the above metrics.

Change-Id: I174d900dea73cca27d32a54a908f43728059be30
Signed-off-by: Brent Hronik <bhronik@codeaurora.org>
msm: bam_dmux: Fix race condition during SSR

BAM DMUX drivers set the global flags to identify the SSR during
SUBSYS_BEFORE_SHUTDOWN notification, but the flags change is not reflected
in some code paths like msm_bam_dmux_write().

Add the SSR flag check and SRCU locking to complete all pending bam dmux
writes before returning the control in SSR call back function for
SUBSYS_BEFORE_SHUTDOWN notification.

CRs-Fixed: 584805
Change-Id: I26647b485977943f272c44f7450ed6c4a4aa62f3
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>