mx6: Fix definition of IOMUXC_GPR12_DEVICE_TYPE_RC

mx6 reference manual incorrectly states that the DEVICE_TYPE field of
IOMUXC_GPR12 register should be configured as '0010' for setting the PCI
controller in RC mode. The correct value should be '0100' instead.

This also aligns with the same value used in the mx6 pci kernel driver.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
imx: ventana: add video enable gpio pinmux for GW54xx

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: add missing crlf to print

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: configure i2c_dis# pin properly for gw53xx

The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was
added to the GW53xx on revB PCB's). Additionally, remove the duplicate
config for GW54xx.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: enable SION bit on gpio outputs

Enable the SION bit on gpio outputs that we wish to be able to read the
value of.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: add iomux for PCISKT_WDIS# gpio

The PCISKT_WDIS# gpio allows for asserting WDIS# going to the various PCIe
sockets on the Ventana board.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: disable 4k tftp/nfs packets

I've encountered issues when using 4k packets through certain switches. For
now disable this and go back to using MTU size packets.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: base SPL MMDC calibration on width and size not board

The IMX6 MMDC calibration registers depend on propagation delay and capacitive
loading between the SoC's MMDC and the DDR3 chips. On the Ventana boards the
board layout varies little in trace-lengths such that propagation delays are
irrelevant thus we can simply things by using calibration values obtained
from various board layouts based on a common SoC and DDR chip configuration.

This eliminates board-model from being needed allowing more flexibility. These
values were tested on a large sample size of Gateworks Ventana boards ranging
in layout, and memory configuration over the entire temperature range supported.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: leave PCI reset de-asserted if PCI enabled

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: enable PCI

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
e1000: Implement dcache support

Implement proper support for cache flushing and invalidation into the
Intel e1000 NIC driver.

Signed-off-by: Marek Vasut <marex@denx.de>
e1000: add i210 support

Signed-off-by: Marek Vasut <marex@denx.de>
pci: add support for board_pci_fixup_dev function

Some board-level drivers may wish to have per-device fixup functions
for PCI devices.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: add GW5520 support

The GW5520 has an IMX6Q SoC with 512MB of DDR3, 256MB of NAND flash as well as:
 * 2x MiniPCIe sockets
 * 2x USB host sockets
 * 2x i210 GigE
 * HDMI out
 * digital I/O expansion

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: add pci fixup for PLX PEX860x switch GPIO

Most Gateworks Ventana boards use a PLX PEX860x PCIe switch for PCIe expansion.
These boards use GPIO on the PLX device as PERST# for the downstream ports
thus we assert this when the PLX is enumerated.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: add i210 support

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: assign default ethprime dynamically

Gateworks Ventana boards don't all use IMX6 FEC, so lets define default
ethprime based off the first detected device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
pci: allow disabling of pci init/enum via env

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
imx: ventana: updated notes regarding NAND boot errata

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
pci: mx6: fix occasional link failures

According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.

Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>