Initial commit
test
Add amiq_hello_world example. In this example it is illustrate how
System Verilog can connect with Octave. The connection path is: System
Verilog - C, C - C++ and C++ - Octave.

The purpose of this example is to print "Hello world" from System
Verilog, C, C++ and Octave.
Add amiq_hello_world example. In this example it is illustrate how
System Verilog can connect with Octave. The connection path is: System
Verilog - C, C - C++ and C++ - Octave.

The purpose of this example is to print "Hello world" from System
Verilog, C, C++ and Octave.
Add amiq_dsp_algorithms project. This example illustrate how to use
Octave built-in functions and how to connect Octave with System Verilog.

In this example 4 Digital Signal Processing functions (Fast Fourier
Transform - FFT, Discrete Cosine Transform - DCT, Finite Impulse
Response - FIR and Convolution) are implemented in System Verilog and
the results are compared with the ones computed by Octave.
Add amiq_dsp_algorithms_fp projects. This project illustrates how System
Verilog can connect with SystemC using DPI-C API. 

In this project 4 Digital Signal Processing functions (Fast Fourier
Transform - FFT, Discrete Cosine Transform - DCT, Finite Impulse
Response - FIR and Convolution) are implemented in System Verilog and
SystemC using fixed point data type.
Fixed README