reverse-finish: turn internal error into normal error

The reverse-finish command results in an internal error if it cannot determine
the current function.

  (gdb) c
  Continuing.

  Program received signal SIGSEGV, Segmentation fault.
  0x0000000000000000 in ?? ()
  (gdb) reverse-finish
  Run back to call of #0  0x0000000000000000 in ?? ()
  gdb/infcmd.c:1576: internal-error: Finish: couldn't find function.
  A problem internal to GDB has been detected,
  further debugging may prove unreliable.
  Quit this debugging session? (y or n) y

This is not an internal error case since the command may be used in scenarios
where there is no function at the current PC, e.g. after calling through a bad
function pointer.

Turn this into a normal error.

gdb/
	* infcmd.c (finish_backward): Turn internal error into normal error.

testsuite/
	* gdb.btrace/segv.c: New.
	* gdb.btrace/segv.exp: New.
Enable elf_backend_rela_normal for AArch64

  If we are generating non-relocatable object and --emit-relocs specified,
  aarch64 ld is actually generating wrong addend for rela entry when
  relocate against local symbol.

  for example, for simple testcase

  foo.c
  ===

  const char * const a = "foo";

  const char *
  foo ()
  {
    return a;
  }

  bar.c
  ===

  const char * const b = "bar";

  const char * bar ()
  {
    return b;
  }

  aarch64-none-linux-gnu-ld --emit-relocs -o x.o  foo.o bar.o
  aarch64-none-linux-gnu-readelf -r x.o

   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0
   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0

   while it should be:

   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0
   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 10
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 10

   bfd generic code could actually handle this properly, but only when
   elf_backend_rela_normal set to '1'.

   this patch enable this and remove those target specific hack.

    bfd/
      * elfnn-aarch64.c (elf_backend_rela_normal): Set to 1.
      (elfNN_aarch64_relocate_section): Remove duplicated addend adjustment
      when info->relocatable be true.

    ld/testsuite/
      * ld-aarch64/emit-relocs-local-addend-bar.s: * New source file.
      * ld-aarch64/emit-relocs-local-addend-foo.s: * Likewise.
      * ld-aarch64/emit-relocs-local-addend.d: * New testcase.
      * ld-aarch64/local-addend-r.d: Likewise.
Fix gdb.trace/entry-values.exp for thumb mode

We see some fails in gdb.trace/entry-values.exp in thumb mode
(-mthumb -march={armv4t,armv7-a}).

In thumb mode, the lsb of references to 'foo' and 'bar' in the assembly
(produced by dwarf assember) is set, so the generated debug
information is incorrect.

This patch copies the approach used by

  [PATCH 4/4] Fix dw2-ifort-parameter.exp on PPC64
  https://sourceware.org/ml/gdb-patches/2014-03/msg00202.html

to introduce new labels 'foo_start' and 'bar_start' which are about
the correct function address (without lsb set).  This patch fixes
these fails we've seen.

gdb/testsuite:

2014-07-08  Yao Qi  <yao@codesourcery.com>

	* gdb.trace/entry-values.c: Define labels 'foo_start' and
	'bar_start' at the beginning of functions 'foo' and 'bar'
	respectively.
	* gdb.trace/entry-values.exp: Use 'foo_start' and 'bar_start'
	instead of 'foo' and 'bar'.
Copy st_other for linker script symbol assignments

This fixes a problem seen on powerpc64le ELFv2 when creating a
function symbol alias with ld --defsym.  st_other needs to be copied
from the source symbol to the alias in order to set up the local entry
offset for the alias.  I decided to make this change in the generic
ELF code rather than in elf64-ppc.c since it looks like other targets
that use st_other bits might benefit too.

bfd/
	* elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other
	bits from source to dest.
	* linker.c (_bfd_generic_copy_link_hash_symbol_type): Update comment.
	* targets.c (struct bfd_target <_bfd_copy_link_hash_symbol_type>):
	Likewise.
	* bfd-in2.h: Regenerate.
ld/testsuite/
	* ld-powerpc/defsym.s, * ld-powerpc/defsym.d: New test.
	* ld-powerpc/powerpc.exp: Run it.
Fix PR 16722 by adding support for 8-byte vector constants.

 * config/tc-arm.c (literal_pool): New field "alignment".
  (find_or_make_literal_pool): Initialize "alignment" to 2.
  (s_ltorg): Align the pool using value of "alignment"
  (parse_big_immediate): New parameter "in_exp". Return
  parsed expression if "in_exp" is not null.
  (parse_address_main): Invoke "parse_big_immediate" for
  constant parameter.
  (add_to_lit_pool): Add one parameter 'nbytes'.
  Split 8 byte entry into two 4 byte entry.
  Add padding to align 8 byte entry to 8 byte boundary.
  (encode_arm_cp_address): Generate literal pool entry if possible.
  (move_or_literal_pool): Generate entry for vldr case.
  (enum lit_type): New enum type.
  (do_ldst): Use new enum type.
  (do_ldstv4): Likewise.
  (do_t_ldst): Likewise.
  (neon_write_immbits): Support Thumb-2 mode.

  * gas/arm/ldconst.s: Add test cases for symbol literal.
  * gas/arm/ldconst.d: Likewise.
  * gas/arm/vldconst.s: Add test cases for vldr.
  * gas/arm/thumb2_vpool.s: Likewise.
  * gas/arm/vldconst.d: New pattern for little-endian.
  * gas/arm/thumb2_vpool.d: Likewise.
  * gas/arm/vldconst_be.d: New pattern for big-endian.
  * gas/arm/thumb2_vpool_be.d: Likewise.
ld/ARM: Increase maximum page size to 64kB

Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.

bfd/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
	value to 64kB and remove custom setting for NaCl.

ld/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
	alignment to 64kB boundary.

ld/testsuite/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
	match bfd.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
	take into account increased segment alignment.
	* ld-arm/ifunc-gdesc.r: Likewise.
	* ld-arm/tls-lib.d: Likewise.
Fix disasm of vmovsd/vmovss with different length values.

gas/testsuite

	* gas/i386/evex-lig256-intel.d: Updated.
	* gas/i386/evex-lig256.d: Updated.
	* gas/i386/evex-lig512-intel.d: Updated.
	* gas/i386/evex-lig512-intel.d: Updated.
	* gas/i386/x86-64-evex-lig256-intel.d: Updated.
	* gas/i386/x86-64-evex-lig256.d: Updated.
	* gas/i386/x86-64-evex-lig512-intel.d: Updated.
	* gas/i386/x86-64-evex-lig512-intel.d: Updated.

opcodes

	* i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
	(EVEX_W_0F10_P_3_M_1): Fix vmovsd.
This fixes PR 17110 which shows that the SH section relocation code can be called
for input BFDs as well as output BFDs.

	PR ld/17110
	* elf32-sh.c (sh_elf_osec_to_segment): Do not look for output
	segments in input bfds.
	* scripttempl/avr.sc: Remove KEEP for .data and
	force .bss VMA to end of .data VMA.
Fix internal error with LTO on ARM.

This prevents the target-specific do_read_symbols methods from being called
twice when do_layout_deferred_sections needs to layout an .eh_frame section.

gold/
	PR gold/15639
	* dynobj.h (Sized_dynobj::base_read_symbols): New method.
	* dynobj.cc (Sized_dynobj::do_read_symbols): Move body to...
	(Sized_dynobj::base_read_symbols): ...new method.
	* object.h (Sized_relobj_file::base_read_symbols): New method.
	* object.cc (Sized_relobj_file::do_read_symbols): Move body to...
	(Sized_relobj_file::base_read_symbols): ...new method.
	* arm.cc (Arm_relobj::do_read_symbols): Call base_read_symbols.
	* mips.cc: (Mips_relobj::do_read_symbols): Likewise.
	* powerpc.cc (Powerpc_dynobj::do_read_symbols): Likewise.
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