change io name in gcd and enable dot backend
Re-add gen to Vec in order to fix some compile issues.
Courtesy of A. Waterman, fix to CPP backend to properly format negative literals in hex
add floating point support for dsp simulation
merge
Separate out tests into files
Simplify handling of signed-unsigned mul/div
Specialize matchWidth for Literals

This avoids generating extra nodes to extend/contract constants
and instead just generates new constants.
For inline Mems, implement masked writes as RMW operations

This is simpler and sometimes better.  Specialized Mem backends should
still support masked write ports natively where beneficial.
Eliminate some useless node assignments due to toBits calls
Don't randomize C++ Mem reads when performing masked writes

The implementation of masked writes relies on this.
Suppress warnings in emulator.h
Speed up bit reversal in C++ quite a bit
Support faster C++ compilation by splitting functions into files

The monolithic Module.cpp is still generated for backwards compatibility,
but a handful of Module-xxx.cpp files are also generated, which can be
compiled in parallel.
Fix warning suppression

push -> pop
Clean up assignment/<>/^^ code
Add basic common subexpression elimination for C++

This substantially reduces node count and speeds up compilation.
I didn't enable it for Verilog, since it does not appear to improve
synthesis results, but it does work if we choose to enable it later.
Only enable CSE with --cse flag
new support for float printf
merge