lmk: Fine tune OOM for screen on/off
* Increase no. of parmeters handled by minfree
* Add interface to set different OOM values for screen on/off
* Add parameter to turn on/off auto set of different OOM values
staging: Allow logcat termination on suspend

* To have bypass for debugs
* Save little more power

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
PM / devfreq: Fix simple_ondemand crashing

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Add sysfs nodes for devfreq governors

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Fix show available freqs

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Add conservative governor

A GPU governor is not rocket science. This one gets the job done pretty
smoothly while complying with devfreq framework rules.

Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Add some conservativeness

Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Always reflect a change of polling interval

Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: conservative: Return 0 if GPU just started

Bailing out early is perfectly fine, so do not trigger an error in
update_devfreq.

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Fixup device transition and usage statistics

Ignore bogus data during slumber in transition and usage stats that
rendered the output basically useless. Also fix the reported GPU
frequency.

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Use high priority workqueue

It does not make sense to run kgsl on high and devfreq on regular
priority.

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
PM: devfreq: Adapt devfreq_get_freq_level to cpubw requirements

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
cpufreq: force cpuN policy to match cpu0 when changing freq or gov

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
cpufreq: Initialize utilization with 0

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
msm: kgsl: Export device state to devfreq

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
deadline: Allow 0ms deadline latency, increase the read speed

Change a timer compare from after to after-equals, thus allowing
0 timeout and making deadline schedule FIFO.

Signed-off-by: xiaobing tu <xiaobing.tu@intel.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
block: deadline: Optimize for non-rotational

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
ARM: kernel: update __cpu_disable to use cache LoUIS maintenance API

When a CPU is hotplugged out caches that reside in its power domain
lose their contents and so must be cleaned to the next memory level.

Currently, __cpu_disable calls flush_cache_all() that for new generation
processor like A15/A7 ends up cleaning and invalidating all cache levels
up to Level of Coherency, which includes the unified L2.

This ends up being a waste of cycles since the L2 cache contents are not
lost on power down.

This patch updates __cpu_disable to use the new LoUIS API cache operations.

Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
ARM: mm: update __v7_setup() to the new LoUIS cache maintenance API

The ARMv7 processor setup function __v7_setup() cleans and invalidates the
CPU cache before enabling MMU to start the CPU with a clean CPU local cache.

But on ARMv7 architectures like Cortex-[A15/A8], this code will end
up flushing the L2 caches(up to level of Coherency) which is undesirable
and expensive. The setup functions are used in the CPU hotplug scenario too
and hence flushing all cache levels should be avoided.

This patch replaces the cache flushing call with the newly introduced
v7 dcache LoUIS API where only cache levels up to LoUIS are cleaned and
invalidated when a processors executes __v7_setup which is the expected
behavior.

For processors like A9 and A5 where the L2 cache is an outer one the
behavior should be unchanged.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Luka Karinja <lk@varjanta.com>
cpufreq: intelliactive: initial coding and introduction!

intelliactive is based on Latest Google Interactive cpufreq governor from
Google.  The original Interactive provides smooth UI operations but suffers
slight battery drain due to its aggressive policies.  Intelliactive is an
improvement built on top of it.

It has the following enhancements added:
1. self-boost capability from input drivers (no need for PowerHAL assist)
2. two phase scheduling (idle/busy phases to prevent from jumping directly to
   max freq
3. Checks for offline cpus and short circuits some unnecessary checks to
   improve code execution paths
4. removed trace calls

Signed-off-by: Paul Reioux <reioux@gmail.com>

Conflicts:
	drivers/cpufreq/Makefile
	include/linux/cpufreq.h