JIT: micro-optimize cmpXX a bit more for lower latency/code size
JIT: use BLR optimization to avoid anding LR with 0xFFFFFFFC

Should save roughly one instruction per blr.
JIT: reorder blr comparisons

This should allow macro-op fusion in blr instructions.
JIT: optimize mulhwu
JIT: merge fcmpx and cror

Almost all uses of boolean condition-register ops in real code seem to be
the combination fcmpx + cror (e.g. for <= or >=). This merges the two.