[mips][microMIPS] Implement disassembler support for 16-bit instructions LI16, ADDIUR1SP, ADDIUR2 and ADDIUS5

Differential Revision: http://reviews.llvm.org/D6419


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222887 91177308-0d34-0410-b5e6-96231b3b80d8
[msan] Remove indirect call wrapping code.

This functionality was only used in MSanDR, which is deprecated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222889 91177308-0d34-0410-b5e6-96231b3b80d8
reinstate r222872: Peephole optimization in switch table lookup: reuse the guarding table comparison if possible.

Fixed missing dominance check.
Original commit message:

This optimization tries to reuse the generated compare instruction, if there is a comparison against the default value after the switch.
Example:
   if (idx < tablesize)
      r = table[idx]; // table does not contain default_value
   else
      r = default_value;
   if (r != default_value)
      ...
Is optimized to:
   cond = idx < tablesize;
   if (cond)
      r = table[idx];
   else
      r = default_value;
   if (cond)
      ...
Jump threading will then eliminate the second if(cond).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222891 91177308-0d34-0410-b5e6-96231b3b80d8