Allow constant folding of copysign

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203076 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: Tag units as having been indexed in GNU pubnames by using a DW_AT_GNU_pubnames of DW_FORM_flag(_present) rather than sec_offsets to the pubnames/types sections

This is consistent with GDB ToT and reduces the number of relocations in
(type and compile) units, substantially reducing relocations and debug
size in fission + type units builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203082 91177308-0d34-0410-b5e6-96231b3b80d8
Replace OwningPtr<T> with std::unique_ptr<T>.

This compiles with no changes to clang/lld/lldb with MSVC and includes
overloads to various functions which are used by those projects and llvm
which have OwningPtr's as parameters. This should allow out of tree
projects some time to move. There are also no changes to libs/Target,
which should help out of tree targets have time to move, if necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203083 91177308-0d34-0410-b5e6-96231b3b80d8
Fix break by qualifying ptrdiff_t with std::.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203084 91177308-0d34-0410-b5e6-96231b3b80d8
Add <cstddef> for use of std::ptrdiff_t.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203086 91177308-0d34-0410-b5e6-96231b3b80d8
Fix warnings about an variable only used in asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203089 91177308-0d34-0410-b5e6-96231b3b80d8
Cleaning up two more pre-Visual C++ 2012 build hacks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203093 91177308-0d34-0410-b5e6-96231b3b80d8
AVX-512: fixed comressed displacement - by Robert Khazanov


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203096 91177308-0d34-0410-b5e6-96231b3b80d8
AVX-512: Added rrk, rrkz, rmk, rmkz, rmbk, rmbkz versions of AVX512 FP packed instructions, added encoding tests for them.
By Robert Khazanov.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203098 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Update namespace formatting to match current guidelines

No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203103 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Use "for (auto" a bit

Just the simple cases for now.  There were a few knock-on changes of
MachineBasicBlock *s to MachineBasicBlock &s.  No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203105 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Use "auto" for cast results

No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203106 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Remove "virtual" from override methods

Also fix a couple of cases where "override" was missing.  No behavioural
change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203110 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] This is a work in progress to provide a machine description
for the Cortex-A53 subtarget in the AArch64 backend.

This patch lays the ground work to annotate each AArch64 instruction
(no NEON yet) with a list of SchedReadWrite types. The patch also
provides the Cortex-A53 processor resources, maps those the the default
SchedReadWrites, and provides basic latency. NEON support will be added
in a subsequent patch with proper forwarding logic.

Verification was done by setting the pre-RA scheduler to linearize to
better gauge the effect of the MIScheduler. Even without modeling the
forward logic, the results show a modest improvement for Cortex-A53.

Reviewers: apazos, mcrosier, atrick
Patch by Dave Estes <cestes@codeaurora.org>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203125 91177308-0d34-0410-b5e6-96231b3b80d8
Micro optimization: this code only needs to look at eh labels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203127 91177308-0d34-0410-b5e6-96231b3b80d8
[XCore] Add support for the "m" inline asm constraint.

Summary:
This provides support for CP and DP relative global accesses in inline
asm.

Reviewers: robertlytton

Reviewed By: robertlytton

Differential Revision: http://llvm-reviews.chandlerc.com/D2943

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203129 91177308-0d34-0410-b5e6-96231b3b80d8
Teach lint about address spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203132 91177308-0d34-0410-b5e6-96231b3b80d8
Fix missing C++ mode comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203133 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Expand selects on vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203134 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Fix extloads from i8 / i16 to i64.

This appears to only be working for global loads. Private
and local break for other reasons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203135 91177308-0d34-0410-b5e6-96231b3b80d8