slimbus: Cleanup dev_list when device is removed

Remove a device's list-entry from controller's
device-list when that device is removed.

Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Change-Id: I068bf34b6692dad33332f4b9baf49e768f5b2736
slim_msm: Handle ADSP SSR gracefully for apps-owned data channels

Usually the data channels are owned by codec, or by ADSP itself. If
apps itself is involved in data-transfer on the channels, make sure
the BAM pipes, or the port-registers in question are not accessed
while ADSP is restarting.

Change-Id: I9476c7389dbf89d902f0ef6572f3f755f0575f7b
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
diag: Mode reset command has to be handled on APPS proc

Mode reset command is handled by APPS proc. If the apps process
has not registered with diag for handling the mode reset command,
diag has to send error response code back. This patch fixes
that issue.

Change-Id: Id4d99f0e909fa3a78e8682825984a99042021bad
Signed-off-by: Katish Paran <kparan@codeaurora.org>
msm_serial_hs: Handle client requests without port open

Adding defensive checks in the APIs to handle the
client driver requests calling without port open.

Change-Id: I0d618abbc7a38151651550a07aa909689ce92054
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
crypto: msm: optimize ce bandwith scaling

Encryption processing at qcrypto driver includes three main steps:
set ce high bandwidth and enable ce clock in cra_init, then send
encrytion request, and at last set ce low bandwidth and disable
clock in cra_exit. This process is fine for the use case where
there are lots of requests between cra_init and cra_exit, but will
introduce large overhead for mmc layer disk encryption as it calls
cra_init, queue request and cra_exit for every encryption request.

It is not necessary to set low bandwidth and disable clock for every
encrypt request when it is completed. So we delay these scaling down
tasks for a while, and just scale down the last request when timer
expires so as to amortize and decrease the overhead.

Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: fix issues in ce clock disable processing

In the situation of more than one requests, the ce clock may get
errorneously disabled even when there are active requests. The
scaling operation is then modified to fix the problem and ensure
all requests are completed when disable the clock. We also clean
up the related codes.

Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: multiple qcrypto support

This patch provides support for multiple qcrypto devices
with the qcrypto driver.

Acked-by: Chemin Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: fix hmac hashing issues with various key size

hmac-sha1 and hamc-sha256 have variable mac key up to a block size.
If user provides a key that is less than the block size, the
key should be padded with zero to the block size before it is
given to the hw.

This padding was not done properly in the driver.
When switch engine between ahash hmac(sha1), hmac(sha256),
and ipsec, problem may happen. ipsec takes 20 bytes of key.
The generated digested data is wrong, even though everything looks
fine from driver. ipsec may fail.

Furthermore, this patch cleanup the driver to do proper setup of
hardware to use hw key or pipe key.

Acked-by: Chemin Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: fix hmac ahashing issues with simultaneous multiple requests.

 This patch fixes two issues. One issue is to do with simultaneous requests
 of a ahash tfm. The other issue is to do with ahash import, and export
 functions.

 Agent issues chain of requests in sequence of init, followed
 by multiple updates, and final to the crypto driver for the hashing of a
 buffer. Each request can be asynchrounous. After a request is complete,
 the next one in the sequence is issued.

 Multiple simultaneous async requests can be issued to the driver
 for the same tfm if they are for independent hashing.

 In the driver, the state variables such as trailing buffer, first
 block, last block are maintained in the driver. The
 state variables are maintained in the request context, instead of
 tfm context. Otherwise, simultaneous async requests can
 confuse each other. This patch moves those variables out of
 tfm context to request context to fix this issue.

 Agent above the driver can import/export ahash state of a request. This
 patch fixes a few issues in the driver to support import/export.
 First issue, the byte count returned from hw for hmac has 64 bytes of
 padding on the first request to the hardware. In the import/export this
 special case needs to be accomodated.

 The 2nd issue is the state buffer is only updated after hardware operation
 complete. For the first, data being accumulated in the trailing buffer,
 and if request has not ever issued to the hw, when import function comes,
 the trailing data needs to be exported. This patch uses trailing
 buffer directly as state buffer variable for import and export.
 The context update functions after hareware request complete are not
 necessary and they are removed. The last issue is to do with state
 variable count. It was not initialized. That may cause hashing generated
 wrong  digest after export and import.

Acked-by: Chemin Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Handle error case

Release memory and disable clk when sps_init fails.

Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Add support for setting XTS data unit size

Based on the context flags set by client, set XTS_DU_SIZE
register to sector size of 1KB, or the actual total length
of the packet.

Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: qce50 ota crypto support

Kasumi/snow-3g f8/f9 are defined by 3gpp, as the algorithms for
UMTS, and LTE for over the air ciphering and integrity. The
algorithms are supported by crypto 5 hardware. This patch
enables qce50 driver to provide Kasumi/snow-3g f8/f9
ciphering and integrity services.

Acked-by: hemin Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Fix key length setting

Hardcoding key length to a constant value results in overwriting
command element information in the command descriptor beyond what
is allocate for the key information in the command element list.
This results in corruption of the command list in the case where
command descriptors are used for configuring crypto registers and
needlessly writing to key registers that are not relevant to the
operation (when writing to registers directly), and thus leads to
crypto operation failures. Fix is to use the key length based on
what is requested by the client.

Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Fix a bug when writing xts du size

The break is missing in the switch-case branch of writing xts du size,
this leads to incorrect xts du size setting.

Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Rename and register crypto algorithms

Add optional crypto algorithm flags to indicates if to use SW crypto
algorithms instead of HW algorithms. Based on it, we then rename and
register crypto algorithms to be qualcomm specific to prevent clashing
with the default SW implementation of the algorithms used by dm_crypt
module. (used for disk encryption).

Change-Id: I39badf22581791c502a247f8f37123f513b8c77e
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Add basic suspend resume functionality

If ce clock is not disabled in suspend state, memory may be corrupted
and device can not wake up. We add an optional flag "clk_mgmt_sus_res"
for qcrypto driver. This flag indicates if the ce clocks need to be
disabled in suspend function and enabled in resume function of qcrypto
driver. When the flag is set, we disable the clocks that are not disabled
in suspend function and re-enable them again in resume function.

Change-Id: I23be38b2765c0cc5f3ed41d65f8e4ae8a9372d18
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: add pm wakeup support for qcrypto driver

Add support for holding system from suspending while an operation
is in progress (when clks are enabled).  This is done by invoking
pm_stay_awake before enabling clks (when a crypto operation is
initiated) and invoking pm_relax when crypto operation is done.

Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Add support for multiple qcrypto devices

Expose APIs to enable qcrypto client to select any specific qcrypto
instance.

Change-Id: Ia96f7fa0f15216c0656aa6dc495db350b3c574a8
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: fix Off-by-one error in computation of length for strlcpy()

size + strlen("qcom-") is equal to the length of string not including the
null character. However,we are comparing it to the length of the buffer,
so we need to include the null character, and make a change to make sure
(size + strlen("qcom-")) is smaller than CRYPTO_MAX_ALG_NAME.

Change-Id: I882e2c3e761a4bd4344ce8820b26cf890f29bab3
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: fix memory leak during algorithm registration

During driver algorithm registration, if there are errors, the
dynamically allocated memory needs to be free on the error return.
Otherwise, there will be memory leak. This patch fixes memory leak
accordingly.

Change-Id: Ic3c65ebd3d6c7b0e88815e6750ec14990e375587
Acked-by: Chemin Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Niranjana Vishwanathapura <nvishwan@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>