make single-byte opcodes take one cycle instead of two.
try to remove idle state at end of multi-byte instructions.
begin refactoring for 8-bit CPU-side access to chipram to reduce
FPGA footprint and hopefully increase clock speed.
continue refactoring for 8-bit chipram datapath.
add new chipram core to ISE project.
use new 8-bit datapath for chipram writes.
fix incorrect address width for chipram writes.