[ARM] arm32ve: Don't trap advanced SIMD instructions for Guest

The VFP virtualization already takes care of SIMD instructions
because SIMD instructions uses VFP data registers which are
saved/restored by VFP virtualization.

This patch disables trapping of advance SIMD instructions for
arm32ve port.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: Add inline macros for reading feature registers

The reading macros for feature registers were missing for arm32ve
port hence this patch.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: Print complete state for normal VCPUs

This patch enables printing entire register state (including
VFP state) on character device for normal VCPUs.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: Print hypervisor context for normal VCPUs

It will be useful to print hypervisor context in arch_vcpu_regs_dump()
for debugging purposes hence this patch.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm64: Support printing of complete state for normal VCPU

This patch does improvements to  cpu_vcpu_helper, cpu_vcpu_sysregs,
and cpu_vcpu_vfp. It primarily adds support for printing complete
state for normal VCPU to a character device.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: Support printing of complete state for normal VCPU

This patch adds support of printing complete state for normal VCPU
to a character device.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: Minor improvements to VFP save/restore

Current, VFP save/restore were directly checking HCPTR value programmed
in HW. This means arch_vcpu_switch() will have to restore HCPTR value
before doing VFP restore which can lead to bugs in-future. This patch
updates VCPU save/restore to check HCPTR value from private context
instead of HW.

Signed-off-by: Anup Patel <anup@brainfault.org>
arm32ve: Add support for CP14 ThumbEE virtualization

ThumbEE, Debug, and Trace support are part of CP14 hence it becomes
important for us to provide infrastructure for virtualizing CP14
register accesses.

This patch adds basic infrastructure for CP14 virtualization and uses
it for virtualizing ThumbEE registers.

All CP14 accesses from VCPU always trap into hypervisor hence for
ThumbEE virtualization we do following:
1. CP14 read access: We return value read from HW on behalf VCPU
and save a copy of it VCPU private context.
2. CP14 write access: We write value to HW and also save a copy of
it in VCPU private context.
3. CP14 save: We don't need to explicitly save registers because
we already keep track of all CP14 read/write accesses via traps.
4. CP14 restore: We have to explicitly restore all register values
by updating them in HW.

Signed-off-by: Sting Cheng <sting.cheng@gmail.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm64: Minor improvements to VFP save/restore

Currently, VFP save/restore were directly checking CPTR_EL2 value
programmed in HW. This means arch_vcpu_switch() will have to restore
CPTR_EL2 value before doing VFP restore which can lead to bugs
in-future. This patch updates VCPU save/restore to check CPTR_EL2
value from private context instead of HW.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm64: Improve ThumbEE virtualization

The arm64 port already had ThumbEE virtualization. This patch makes
arm64 ThumbEE virtualization in-line with arm32ve port.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: Add support for CP14 ThumbEE virtualization

The ARMv7 processors have ThumbEE extensions which can be used
by Java or Dalvick based root filesystems such as Android.

ThumbEE, Debug, and Trace support are part of CP14 hence it becomes
important for us to provide infrastructure for virtualizing CP14
register accesses.

This patch adds basic infrastructure for CP14 virtualization and uses
it for virtualizing ThumbEE registers.

All CP14 accesses from VCPU always trap into hypervisor hence for
ThumbEE virtualization we do following:
1. CP14 read access: We return value read from HW on behalf VCPU
and save a copy of it VCPU private context.
2. CP14 write access: We write value to HW and also save a copy of
it in VCPU private context.
3. CP14 save: We don't need to explicitly save registers because
we already keep track of all CP14 read/write accesses via traps.
4. CP14 restore: We have to explicitly restore all register values
by updating them in HW.

Please note that the CP14 virtuatization added by this patch in an
adapted from arm32ve port.

Signed-off-by: Sting Cheng <sting.cheng@gmail.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: arm64: Fix cpu_vcpu_coproc for instruction emulation

The ARM instruction emulation library under arch/arm/cpu/common uses
cpu_vcpu_coproc provided by arm32, arm32ve, and arm64 to determing
coprocessor callbacks.

This patch fixes cpu_vcpu_coproc for arm32ve and arm64 because we now
have CP14 read/write functions available in both these ports.

Signed-off-by: Anup Patel <anup@brainfault.org>
[TESTS] Enable ThumbEE extensions in defconfigs for arm32 guest linux

We have ThumbEE virtualization available in arm32, arm32ve, and arm64
hence enable ThumbEE extensions in linux defconfigs of Realview-PB-A8,
VExpress-A9, and VExpress-A15 guests.

Signed-off-by: Anup Patel <anup@brainfault.org>
[TESTS] arm32: Add busybox-1.21.1 defconfig and update documentation

We quite often get questions regarding cross-compiler to be used for
compiling Xvisor, Guest Linux kernel, and Guest RootFS.

The file <xvisor_source>/docs/SupportedToolChains only talks about
cross-compiler to be used for Xvisor and Guest Linux kernel.

This patch adds info regarding cross-compiler to be used for compiling
BusyBox based rootfs and busybox-1.21.1 defconfig.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: Fix minor typo in cpu_inline_asm.h

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] clk: Minor fix in __clk_disable()

The __clk_disable() must not be called with NULL clk hence
check parent clk in __clk_disable() before recursively calling
__clk_disable() on parent clk.

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] video: Minor fix in fb_dealloc_cmap()

We should always ensure that pointer is not-NULL before calling
vmm_free() to avoid unnecassary panic.

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] video: Support stacking calls to fb_open() and fb_release()

A frame buffer device can be opened from multiple places hence we need
a stacking mechanism for users of a frame buffer device.

This patch implements a LIFO list of users for each frame buffer device.
When a frame buffer is opened, we call save routine of frame buffer user
on top of LIFO list and add new frame buffer user to LIFO list. When a
frame buffer is released (i.e. closed), we remove current frame buffer
user from LIFO list and call restore routine of frame buffer user on top
of LIFO list.

The patch also updates VTEMU implementation to use the stacking calls to
fb_open() and fb_release().

Signed-off-by: Anup Patel <anup@brainfault.org>
[TESTS] Improve Guest NOR flash utilization

Currently, we have 16MB of NOR flash in all types of arm32 and arm64
Guests. The Guest NOR flash has: basic firmware (1M), linux kernel
image (6M), and rootfs (6M). This means we still have 3MB of Guest
NOR flash unused for almost all arm32 and arm64 Guests.

This patch reorganizes Guest NOR flash to have: basic firmware (1M),
linux kernel (8M), and rootfs (7M). This way we utilize complete
16MB of Guest NOR flash.

Signed-off-by: Anup Patel <anup@brainfault.org>
[EMULATORS] arm_sysregs: Add emulation of VExpress cfgctrl registers

The VExpress-A9 and VExpress-A15 guests have clocking and voltage regulation
vial cfgctrl registers of arm_sysregs. Recent linux kernels (i.e. linux-3.10
or higher) use cfgctrl registers of VExpress boards extensively hence this
patch improves our arm_sysregs emulator to provide correct emulation of
cfgctrl registers.

Signed-off-by: Anup Patel <anup@brainfault.org>