Removed line in Vec.scala to not generate ROMs, because it breaks verilog
Merge branch 'master' into dse
Added flags to call Params.dump and Params.load from chiselMain
Fixed mismatched type issue
Fixed misspelling of 'flattenning'
Relocated jackhammer functions into chisel
Added Jackhammer.scala to implement jackhammer functionality, including dumping and loading .prm files
Merge branch 'master' of https://github.com/ucb-bar/chisel into dse

Conflicts:
	src/main/scala/Vec.scala
A large commit:
 -Added oscar lib for constraint solving for Jackhammer
 -Refactored Jackhammer to plug into oscar
 -Refactored Param classes to enable constraints between parameters
 -Changed serialization and deserialization to work with new parameters
Cleaned up filename of design.prm files
Merge branch 'master' of github.com:ucb-bar/chisel into dse
Cheatsheet work in progress
Add more sections to cheatsheet
fame1 queue compiles
fix build.scala
Catch remaining param classes for cpp generation
Merge branch 'master' of github.com:ucb-bar/chisel into dse
remove fame1 instance variables from Module.scala; disable memory enables with fire signals
streamline io check by using isIo instead of isModuleIo which was redundant
Merge branch 'master' of github.com:ucb-bar/chisel into dse