msm: pil: Proxy unvote after pil_shutdown() when using IRQs

Subsystems might use an IRQ for removal of proxy votes via the
power/clock ready interrupt. So, if a peripheral shutdown is triggered
before the power/clock ready interrupt is received, remove the proxy
votes and bypass the unvoting in the power/clock ready interrupt handler.
Conversely, if the power/clock interrupt is received before shutdown is
triggered, bypass the unvoting during pil shutdown.

Also, remove the hack to proxy unvote directly from the pil-q6v5-mss
driver.

Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-q6v5-mss: Factor out PIL code into a separate library.

pil-q6v5-mss.c contains code for both the PIL and subsystem
implementations. Factor out the PIL specific code into a
pil-msa.c library so it can be reused by other subsystems
which use the same/similar self-authentication mechanisms.

Acked-by: Jennifer Zenner <jzenner@qti.qualcomm.com>
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-q6v5-mss: Do not generate redundant smem ramdump

When the device crashes, smem ramdump is already generated by the smem
driver. Therefore, the smem ramdump generated by pil-q6v5-mss is redundant
and the code responsible for it can be taken out.

Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-q6v5-mss: Initialize the stop ack completion variable

In case of targets that don't use the PIL framework to boot the modem,
the stop_ack completion variable might remain in uninitialized state as
the initialization is currently being done only within PIL callbacks.
So, fix this my initializing the completion variable outside of PIL
by callbacks.

Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-q6v5-mss: Perform proxy voting/unvoting at mba bootup

Currently, both mba and q6 devices perform voting and unvoting during
bootup via pil. This is done because earlier the clock ready interrupt was
not provided by the modem booting up. But now that we have the clock ready
interrupt being sent by the modem, we can make the proxy votes for the PBL
while booting up. Later when the modem has finished booting up it would
send the clock ready interrupt and at that time we would remove the proxy
votes made for the PBL. So remove the PBL proxy votes after receiving the
clock ready interrupt from the modem.

Also, having IRQF_SHARED in the proxy unvote IRQ registration is
unnecessary because the the power/clock ready interrupt is not shared
among subsystems. So remove that as well.

Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: subsystem_restart: Move device tree parsing code into the framework

Every driver has to repeat the code for parsing device tree nodes for the
SMP2P gpios. So, move this parsing code into the framework level to avoid
this duplication of code.

Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil: Move device tree parsing code into the framework

Every driver has to repeat the code for parsing device tree nodes for the
proxy unvote IRQ. So, move this parsing code into the framework level to
avoid this duplication of code.

Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: scm-pas: Remove cpu_is_* checks

The soc type check is included in scm_pas_init in order to assign
different source port IDs to the bus bandwidth voting vectors.
The check is removed by making scm_pas_init a function to which
the source port ID is passed in as a parameter. This change assumes
that the destination port remains the same across all SOCs. The
scm_pas_init function is invoked from individual pil drivers.

Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: scm-pas: Flush the metadata buffer

In the near future, scm_call will no longer flush
the entire cache in order to ensure that the secure
world doesn't see stale data. Therefore, flush the
metadata buffer from the cache before invoking
scm_call.

Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-q6v5-mss: Correct kzalloc return path checking

devm_kzalloc returns NULL on failure, not an error code.
Fix the check done on mba_data after the allocation.

Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-venus: Move the GDSC control out of PIL driver

The PIL driver has full control of the Venus GDSC. It turns
on the GDSC when booting up venus and leaves it on until
venus is shutdown.

In order to save more power during video playback, interframe
power collapse can be used. This requires that the GDSC can be
turned on/off during video playback.

In order to allow the Venus driver to turn on/off the GDSC, the
PIL driver should no longer hold the GDSC on throughout the time
Venus is booted up. It is safe to do so since the Venus driver
has already added GDSC control.

Note that the proxy voting of GDSC is still present solely for
the purpose of allowing standalone testing of the Venus PIL
driver.

Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-venus: Decrease the proxy time out value

A smaller value of proxy time out (2 sec) is good enough for venus
driver to take over the control of the proxy voting resources.

Making proxy time out smaller also has the advantage that the venus
driver can do power collapse of the core sooner if needed to save
power.

Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil-q6v5-lpass: Remove disabling watchdog irq multiple times

Disabling watchdog irq twice requires enabling it an equal number
of times. Due to the watchdog irq being disabled twice while being
enabled only once; on watchdog bite happening muliple times, the
watchdog handler is not fired for the subsequent ones.

This change makes sure that this is rectified by disabling the
irq only once when the subsystem is shutdown during restart.

Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: pil: Unregister modem notifer on failure to create kobj

Correct functionality to unregister the modem notifier if creating
a kobject for the audio voice service fails.

Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: smem: split out shared memory initialization functionality

For historical reasons, the low level shared memory initialization
functionality exists in a combined driver with the higher level
communication protocols.  Move the low level shared memory functionality
out into its own driver to improve clarity and ease maintenance.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: smem: Add NAND Device Item

Add new SMEM item used for passing NAND device parameters between
subsystems.

Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: smd: add support for secondary channel table

The primary SMD channel table only supports 64 entries and is currently at
capacity. Since the primary channel table cannot be extended as the SMEM
item ids following the primary table are already reserved for other
usecases, create a secondary channel table by repurposing the unused block
channel table SMEM items.  This extention creates an additional 64 entries
for new SMD channels allowing the system to support a total of 128
channels.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: smem: add mpu based security support

Add support for the Memory Protection Unit (MPU) based shared memory
security feature.  This feature fragments shared memory into multiple
partitions and restricts access for each partition to a limited set of
processors which is enforced by MPUs.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: gdsc: Make enable/disable function clock controls symmetric

Currently, resets are asserted and de-asserted in the same order,
which works fine for cores with only one resettable clock domain,
but causes issues on 8x10 (VFE) where multiple clock domains are
resettable and order matters.

For cleanliness, also make the order of setting/clearing the memory
retention signals symmetric, although order there doesn't matter
at all.

Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
hammerhead: smem: split out shared memory initialization functionality

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>