Enable mapping higher physical address

Current ATF uses a direct physical-to-virtual mapping, that is, a physical
address is mapped to the same address in the virtual space. For example,
physical address 0x8000_0000 is mapped to 0x8000_0000 virtual. This
approach works fine for FVP as all its physical addresses fall into 0 to
4GB range. But for other platform where all I/O addresses are 48-bit long,
If we follow the same direct mapping, we would need virtual address range
from 0 to 0x8fff_ffff_ffff, which is about 144TB. This requires a
significant amount of memory for MMU tables and it is not necessary to use
that much virtual space in ATF.

The patch is to enable mapping a physical address range to an arbitrary
virtual address range (instead of flat mapping)
Changed "base" to "base_va" and added "base_pa" in mmap_region_t and
modified functions such as mmap_add_region and init_xlation_table etc.
Fixes ARM-software/tf-issues#158
Include 'platform_def.h' header file in 'crash_reporting.S'

'crash_reporting.S' needs to include 'platform_def.h' to get the
definition of PLATFORM_CORE_COUNT.

Note: On FVP it was compiling because 'platform_def.h' gets included
through 'plat/fvp/include/plat_macros.S' but we don't want to rely on
that for other platforms.

Change-Id: I51e974776dd0f3bda10ad9849f5ef7b30c629833
PL011: Fix a bug in the UART FIFO polling

Before attempting to write a character, the PL011 driver polls
the PL011_UARTFR_TXFF bit to know whether the UART FIFO is full.
However, the comparison with 1 was incorrect because
PL011_UARTFR_TXFF is not at bit 0. This patch fixes it.

Change-Id: If78892345bbdc8a5e4ae4a1b7159753c609681b0
Make the entry point argument optional in load_image()

There are cases where the entry point information is useless to the
caller, e.g. when an image just needs to be loaded in memory but won't
ever be executed.

This patch allows load_image() function to take a NULL pointer as the
entry point argument. In this case, it won't be populated.

Change-Id: Ie9394b054457706c6699926c5e0206e0c3851c56
fvp: Remove unused 'bl2_el_change_mem_ptr' variable

'bl2_el_change_mem_ptr' variable is a left over from the former
BL2/BL3-1 interface.

Change-Id: Ib0979c8e2809e103a41f9c5cc4afec7dd21ac9ab
Make system register functions inline assembly

Replace the current out-of-line assembler implementations of
the system register and system instruction operations with
inline assembler.

This enables better compiler optimisation and code generation
when accessing system registers.

Fixes ARM-software/tf-issues#91

Change-Id: I149af3a94e1e5e5140a3e44b9abfc37ba2324476
Merge Pull Request #120 (patch 1) from 'linmaonly:lin_patch2'
Provide cm_get/set_context() for current CPU

All callers of cm_get_context() pass the calling CPU MPIDR to the
function. Providing a specialised version for the current
CPU results in a reduction in code size and better readability.

The current function has been renamed to cm_get_context_by_mpidr()
and the existing name is now used for the current-CPU version.

The same treatment has been done to cm_set_context(), although
only both forms are used at present in the PSCI and TSPD code.

Change-Id: I91cb0c2f7bfcb950a045dbd9ff7595751c0c0ffb
Make the BL3-1 crash reporting optional

This patch makes the console crash dump of processor register
state optional based on the CRASH_REPORTING make variable.

This defaults to only being enabled for DEBUG builds. This can
be overridden by setting a different value in the platform
makefile or on the make command line.

Change-Id: Icfa1b2d7ff0145cf0a85e8ad732f9cee7e7e993f
Merge pull request #125 from sandrine-bailleux/sb/remove-bl2_el_change_mem_ptr

fvp: Remove unused 'bl2_el_change_mem_ptr' variable
Merge pull request #126 from sandrine-bailleux/sb/include-missing-hfile

Include 'platform_def.h' header file in 'crash_reporting.S'
Merge pull request #127 from sandrine-bailleux/sb/fix-pl011-fifo-polling

PL011: Fix a bug in the UART FIFO polling
Merge pull request #128 from sandrine-bailleux/sb/make-load_image-ep-optional

Make the entry point argument optional in load_image()
Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2

Make system register functions inline assembly v2
Merge pull request #131 from athoelke/at/cm_get_context

Provide cm_get/set_context() for current CPU
Merge pull request #133 from athoelke/at/crash-reporting-opt

Make the BL3-1 crash reporting optional
Set correct value for SYS_ID_REV_SHIFT in FVP

According to documentation, the Rev field is located at bit 28 in
the V2M sysid register.

Fixes ARM-software/tf-issues#179

Change-Id: I2abb7bdc092ccd3f41f8962dc8d8d8e44e8dfdc3
Merge pull request #134 from jcastillo-arm/jc/tf-issues/179

Set correct value for SYS_ID_REV_SHIFT in FVP
Remove re-initialisation of system timers after warm boot for FVP

This patch removes the reinitialisation of memory mapped system timer
registers after a warm boot for the FVP. The system timers in FVP are
in the 'Always ON' power domain which meant the reinitialisation was
redundant and it could have conflicted with the setup the normal
world has done.

The programming of CNTACR(x) and CNTNSAR, the system timer registers,
are removed from the warm boot path with this patch.

Fixes ARM-software/tf-issues#169

Change-Id: Ie982eb03d1836b15ef3cf1568de2ea68a08b443e
Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers

Remove re-initialisation of system timers after warm boot for FVP