drm/i915/hsw: Disable L3 caching of atomic memory operations.

Back ported this patch to work around bug on Haswell w.r.t. shader atomic counters. System will lock up and require power cycle if run any shader using atomic operations.

Otherwise using any atomic memory operation will lock up the GPU due
to a Haswell hardware bug.

v2: Use the _MASKED_BIT_ENABLE macro.  Drop drm parameter definition.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: <stable@vger.kernel.org>
[danvet: Fix checkpatch fail.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Conflicts:
	drivers/gpu/drm/i915/intel_pm.c