[LIBS] libfdt: Add APIs to access memreserve enteries in FDT

Bootloader can provide reserved areas of RAM/memory via memreserve
enteries in FDT.

This patch adds APIs in libfdt to access memreserve enteries in
FDT.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_host_aspace: Reserve RAM areas as provided by arch code

This patch adds mechanism for arch code to provide reserved RAM areas
at host aspace init time. This can be very useful on SMP host where
secondary cores are spinning on some RAM area which should never be
overwritten. It is also useful when we have additional microcontroller
in SOC that runs a firmware residing in some part of RAM.

Signed-off-by: Anup Patel <anup@brainfault.org>
[TESTS] Enable RTC drivers for Linux-3.16 on VersatilePB guest

Somehow we missed out RTC drivers for Linux-3.16 defconfig for
VersatilePB guest hence this patch.

Signed-off-by: Anup Patel <anup@brainfault.org>
Merge remote-tracking branch 'upstream/master' into imx6
[TOP] Supress unwanted make directory prints

This patch supresses make directory entry/exit prints so that
our build output looks clean.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] vgic: Minor performance improvements

This patch does following improvements to VGIC driver:
1. Use lite version of spin lock APIs
2. Remove host2guest_lock and host2guest_bmap
3. Make host2guest_irq as atomic array

Signed-off-by: Anup Patel <anup@brainfault.org>
[TESTS] Syncup guest linux defconfigs based on linux-3.16-rc3

Minor patch to update Guest linux defconfigs based on linux-3.16-rc3.

Signed-off-by: Anup Patel <anup@brainfault.org>
Merge remote-tracking branch 'upstream/master' into imx6
[TESTS] Enable LPAE for linux-3.16 on virt-v7 and vexpress-a15 guests

By default, always perfer LPAE in guest when available.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: arm64: Trap and yield when VCPU executes WFE instruction

Just like other hypervisors we trap WFE instruction and yield the
VCPU timeslice so that other things can have a chance to run.

In fact, our arm32 port already traps WFE instruction and yields
on WFE. Some how we had missed this part for arm32ve and arm64
port hence this patch.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: Low-level context switching of banked registers

This patch introduces low-level context switching infrastructure
for arm32ve port and uses it implement low-level context switching
of banked registers.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: Cleanup and improve low-level context switching

This patch makes low-level context switching functions more
readable by introducing offset related defines in cpu_defines.h
and also adding lot of comments in arch_regs.h

This patch also adds low-level context switching of CP15 registers.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] vgic: Optimize __vgic_sync_vcpu_hwstate() implementation

This patch does following optimizations to __vgic_sync_vcpu_hwstate():
1. Move maintainence irq related stuff from __vgic_sync_vcpu_hwstate()
to vgic_main_irq().
2. Keep track of used LR register count and skip __vgic_sync_vcpu_hwstate()
when used LR register count is zero.

Signed-off-by: Anup Patel <anup@brainfault.org>
Merge remote-tracking branch 'upstream/master' into imx6
[ARM] arm32ve: Low-level context switching of generic timers

This patch adds necessary infrastructure for low-level context
switching of generic timer registers and implements it for arm32ve.

Signed-off-by: Anup Patel <anup@brainfault.org>
Merge remote-tracking branch 'upstream/master' into imx6