Disabled watchdog and initialize uart.

N/A

1. Watchdog reset is asserted when software fails to prevent the watchdog
   timer from timing out. In case program sink into cycle, disable it in
    lowlevel_init.
2. The Universal Asynchronous Receiver and Transmitter (UART) in S5PV210 provide
   four independent asynchronous, and serial input/output (I/O) ports. All the
   ports operate in an interrupt-based or a DMA-based mode.

Signed-off-by: liminghao <liminghao@xiaomi.com>