Add definition for CP15 registers. Define new inline TLB and cache functions.
Cleanup exception.S. Prepare for later unification of data_abort_handler() and prefetch_abort_handler().
First step in cleanup of locore.S. Fix initial stack allocation. Rename initial page table and use it for startup of secondary cores too. Same page table can be used for CPU hot plug and/or power management later.
Add new ARMv6 specific trap-v6.c.
Add new pmap code.
Fix handling of direct section unmapping.
    Use local variant of tlb_fush functions where appropriate
Merge r271716
Implement initial version of cpuinfo.
Rename pmap_tlb_flush_page. Use correct argument type  when calling tlb_flush functions. Minor cleanup nits.