Inliner: Non-local functions in COMDATs shouldn't be dropped

A function with discardable linkage cannot be discarded if its a member
of a COMDAT group without considering all the other COMDAT members as
well.  This sort of thing is already handled by GlobalOpt/GlobalDCE.

This fixes PR21206.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219335 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Avoid generating inc/dec when slow for x.atomic_store(1 + x.atomic_load())

Summary:
I had forgotten to check for NotSlowIncDec in the patterns that can generate
inc/dec for the above pattern (added in D4796).
This currently applies to Atom Silvermont, KNL and SKX.

Test Plan: New checks on atomic_mi.ll

Reviewers: jfb, nadav

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219336 91177308-0d34-0410-b5e6-96231b3b80d8
Remove a bunch of getSubtargetImpl calls since we already have
a cached TLI instance.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219342 91177308-0d34-0410-b5e6-96231b3b80d8
Push DwarfDebug::constructScopeDIE down into DwarfCompileUnit

One of many steps to generalize subprogram emission to both the DWO and
non-DWO sections (to emit -gmlt-like data under fission). Once the
functions are pushed down into DwarfCompileUnit some of the data
structures will be pushed at least into DwarfFile so that they can be
unique per-file, allowing emission to both files independently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219345 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: The rest of pushing DwarfDebug::constructScopeDIE down into DwarfCompileUnit

Funnily enough, I copied it, but didn't actually remove the original in
r219345. Let's do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219346 91177308-0d34-0410-b5e6-96231b3b80d8
Remove dead call to getTypeToTransformTo. The result is
unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219347 91177308-0d34-0410-b5e6-96231b3b80d8
Sink and coalesce DwarfDebug.cpp::addSectionLabel and DwarfUnit::addSectionLabel down into DwarfCompileUnit::addSectionLabel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219351 91177308-0d34-0410-b5e6-96231b3b80d8
Use llvm-symbolizer to symbolize LLVM/Clang crash dumps.

This change modifies fatal signal handler used in LLVM tools.
Now it attempts to find llvm-symbolizer binary and communicates
with it in order to turn instruction addresses into
function/file/line info entries. This should significantly improve
stack traces readability in Debug builds.

This feature only works on selected platforms (including Darwin
and Linux). If the symbolization fails for some reason, signal
handler will fallback to the original behavior.

Reviewed in http://reviews.llvm.org/D5610


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219354 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r219354. It seems to break some buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219355 91177308-0d34-0410-b5e6-96231b3b80d8
Reformat some stuff I missed in recent previous commits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219356 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Don't transform atomic-load-add into an inc/dec when inc/dec is slow

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219357 91177308-0d34-0410-b5e6-96231b3b80d8
[AVX512] Peel off an asm-only class from AVX512_masking_common.

No functional change.

This enables the generation of masking instructions that don't provide a
ISel pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219358 91177308-0d34-0410-b5e6-96231b3b80d8
[AVX512] Support mask register in MRMDestReg format

This is necessary for masking vextract*x4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219359 91177308-0d34-0410-b5e6-96231b3b80d8
[AVX512] Move DAG for all-zero node to X86VectorVTInfo

No functional change.

No change in X86.td.expanded except for the appearance of the new attributes.

The new attributes will be used in the subsequent patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219360 91177308-0d34-0410-b5e6-96231b3b80d8
[AVX512] Add asm-only support for vextract*x4 masking variants

These derive from the new asm-only masking definitions.

Unfortunately I wasn't able to find a ISel pattern that we could legally
generate for the masking variants.  The problem is that since the destination
is v4* we would need VK4 register classes and v4i1 value types to express the
masking.  These are however not legal types/classes in AVX512f but only in VL,
so things get complicated pretty quickly.  We can revisit this question later
if we have a more pressing need to express something like this.

So the ISel patterns are empty for the masking instructions and the next patch
will add Pat<>s instead to match the intrinsics calls with instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219361 91177308-0d34-0410-b5e6-96231b3b80d8
[AVX512] Intrinsics for vextract*x4

This adds the Pat<>'s for the intrinsics.  These are necessary because we
don't lower these intrinsics to SDNodes but match them directly.  See the
rational in the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219362 91177308-0d34-0410-b5e6-96231b3b80d8
[AVX512] Rename AVX512_masking* to AVX512_maskable*

No functional change.

This is the current AVX512_maskable multiclass hierarchy:

                 maskable_custom
                    /       \
                   /         \
          maskable_common   maskable_in_asm
            /         \
           /           \
      maskable        maskable_3src

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219363 91177308-0d34-0410-b5e6-96231b3b80d8
Sink DwarfUnit::addSectionDelta into DwarfCompileUnit, the only place it's needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219364 91177308-0d34-0410-b5e6-96231b3b80d8
Fix typo in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219365 91177308-0d34-0410-b5e6-96231b3b80d8
Remove getSubtargetImpl calls from FastISel, we can get it from
the MachineFunction where it's already cached.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219366 91177308-0d34-0410-b5e6-96231b3b80d8