Add support for the custom git setup on our buildbots that has no remote
against which to diff.  We skip the diff content check in that case.
i#1551 port to ARM: encode GPR register lists

Adds encoding for GPR register lists.
The strategy is to greedily consume all GPR's in the operand sequence when
a register list type is encountered, recording the start and endpoints.  If
the subsequent type is a plain GPR, and the list had more than one
register, the final register is peeled off from the list and assigned to
the plain GPR.

This only works with only one register list per template (already required
on decoding) and at most one plain reg immediately following a register
list type.  Our new previously-committed decoder debug checks ensure this
for us.

Adds OPND_CREATE_MEMLIST().

Still TODO: add SIMD register list encoding support.
i#1551 port to ARM: OP_vtbl and OP_vtbx register lists

Adds new types TYPE_L_VAx{2,3,4} for OP_vtbl and OP_vtbx.
i#1551 port to ARM: OP_vtb{l,x} decoding

Adds a new table to properly decode OP_vtb{l,x} whose use of VA thwarts the
prior decoding sequence.

Removes the incorrect VA from OP_vcl{s,z}.
i#1551 port to ARM: decoding of memory before reglist

When decoding, we now get the memory access size right when it precedes its
corresponding reglist operand.

Adds missing size names for disassembly suffixes for register-list-sized
memory accesses.
Add new alias "split" for splitting a feature branch in our workflow.
i#1551 port to ARM: finish off ARM decoding by adding all memory types

Adds decoding of the memory operand types that decrement or increment
before or after and operate on variable register list-based sizes.

Ensures that opnd_get_flags() does not return incorrect information on x86
as the flags field is ARM-only.
i#1551 port to ARM: encode SIMD register lists

Adds encoding rules for the various types of SIMD register lists.

Fixes some issues encountered during testing:
+ Fixes several missing pieces in GPR register list encoding.
+ Fixes a decoding error in the A32_ext_vldB table index computation.
+ Fixes an incorrect memory size in INSTR_CREATE_pop_list.

Adds logging output throughout the encoder.
Fixes issue 1648
i#1551 Port DynamoRIO to ARM: add steal reg API

On ARM, we need steal a register for DynamoRIO usage, e.g., TLS access.
This is the API we plan to support, including
- runtime option: -steal_reg
- API: dr_get_stolen_reg, dr_insert_get_stolen_reg, and reg_is_stolen

Review URL: https://codereview.appspot.com/178700043
i#1551 port to ARM: add encoding of immeds

Adds encoding rules for the various immediate template types.
i#1551 port to ARM: add encoding of memory types

Adds encoding rules for memory types.  This includes checking consistency
of the separate writeback or post-indexed displacement/index/shifted-index
versus the inside-memory-operand values.

Fixes INSTR_CREATE_push to add the negative offset to the memory operand
(writeback, not post-indexed).
Add new code review front end: "git review"

Adds an alias "git review" that calls a new script git_review.sh.  It
provides simple updates of new patchsets to the same review, commit message
reviewing by uploading the precise message for each patchset, and
auto-adding of the review URL to the commit message.

The existing "git dcommit" now also calls git_review.sh to mark the review
as committed with its final diff and a pointer to the online commit, as
well as remove the current review issue marker.

Review-URL: https://codereview.appspot.com/187770044
i#1551 Port DynamoRIO to ARM: add new TLS typ TLS_TYPE_SWAP

There is only one thread pointer (register) is available on ARM Linux.
In order to support DR TLS reference in normal C code, we steal an app TLS
slot in the DR context and restore its app value on entering code cache.
- add TLS_TYPE_SWAP
- add TLS_SWAP_SLOT_OFFSET
- add get_app_tls_swap_slot_addr on ARM
- implement tls_thread_init and tls_thread_free for ARM
- rename is_thread_register_initialized to is_thread_tls_initialized
- adjust default options in ARM

Review-URL: https://codereview.appspot.com/188840043
i#1551 Port DynamoRIO to ARM: fixed atomic operations macros on ARM
- add "cmp   r2, #0" at the end for possible SET_FLAG use
- partially disable cpuid test

Review-URL: https://codereview.appspot.com/182690043
i#1551 Port DynamoRIO to ARM: fix unix_tests build error on ARM

Review-URL: https://codereview.appspot.com/189770044
i#1551 Port DynamoRIO to ARM: implement safe_read_asm and atomic_swap on ARM

Review-URL: https://codereview.appspot.com/186170043
i#1551 Port DynamoRIO to ARM: implement dr_setjmp/dr_longjmp on ARM

Review-URL: https://codereview.appspot.com/184330043
i#1551 Port DynamoRIO to ARM: adjust reg_names and dr_reg_fixer array
- add DR_REG_TPIDRURW and DR_REG_TPIDRURO to dr_reg_fixer
- add "tpidrurw" and "tpidruro" to reg_names

Review-URL: https://codereview.appspot.com/190770043
i#1551 port to ARM: add instr_t operand support

Adds new immediate type with encoding and decoding rules for the
signed value stored divided by 4 used by OP_b and OP_bl.

Adds encoding support for an instr_t operand in place of an
immedate, as both an absolute address value and a pc-relative
value (e.g., labels).

OP_b, OP_bl, and OP_smc were not marked as having predicates: fixes that.

Fixes improper sign-extension of signed immedates on decoding.

Still TODO: intr_t memory operands.