Thumb encoding: correctly deal with misaligned loads of the form
   LD Rt, [Rn +/- #imm12]  when Rn == PC
Fixes #333145.  (dimitry@google.com)



git-svn-id: svn://svn.valgrind.org/vex/trunk@2859 8f6e269a-dfd6-0310-a8e1-e2731360e62c
Thumb encoding: fix assertion failure caused by
"ldr.w pc, [reg, #imm]".  Fixes #333428.  (dimitry@google.com)



git-svn-id: svn://svn.valgrind.org/vex/trunk@2860 8f6e269a-dfd6-0310-a8e1-e2731360e62c