lm32-include: added collection of GSI c-sources for lm32. To be continued
lm32-include: mprintf, fixed missing width specifier recognition. Who commented this out ???
tools: test also LVDS input on pexarria5
monster: remove configurable PLL skew

The problem with using the PLL phase shifter to compensate skew between
the LVDS-PLL and transceiver clock inputs is that you cannot shift the
LVDS serdes clock. Thus you need to put the settings directly into the
PLL's megawizard. Fortunately, it seems that LVDS compensation mode
happens to have the correct phase offsets by default for our board!
syn: refresh project files with hdlmake
Merge branch 'asterisk' into proposed_master
general-cores: include irq and flash bugfixes
etherbone: include fixes for large SDB over UDP and blocking on failure
Merge branch 'stefan-wip' into asterisk

Conflicts:
	syn/gsi_scu/control2/scu_control.qsf
	syn/gsi_scu/control3/scu_control.qsf
build: add a 'gateware' target
build: refresh qsf files with hdl-make
release: disable function generator firmware
iotest: make pulse width controlled by macros
iotest: support all form factors with same test procedure
pexarria5: connect PBS2 as reset button
monster: use family constants to eliminate possibility of typo
monster: add f_pick to select between alternatives in an expression
monster: reset arria5 PLLs for longer (to fix LVDS glitches)
monster: eliminate duplicated phase code
Merge branch 'asterisk' into proposed_master