[AArch64] Implement CRC32 ACLE intrinsics.

	* config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
	* Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
	dependencies.
	* config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
	(aarch64_crc_builtin_datum): New struct.
	(aarch64_crc_builtin_data): New.
	(aarch64_init_crc32_builtins): New function.
	(aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
	(aarch64_crc32_expand_builtin): New.
	(aarch64_expand_builtin): Add CRC32 builtin expansion case.
	* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
	__ARM_FEATURE_CRC32 when appropriate.
	(TARGET_CRC32): Define.
	* config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
	UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
	UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
	(aarch64_<crc_variant>): New pattern.
	* config/aarch64/arm_acle.h: New file.
	* config/aarch64/iterators.md (CRC): New int iterator.
	(crc_variant, crc_mode): New int attributes.
	* doc/aarch64-acle-intrinsics.texi: New file.
	* doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
	Include aarch64-acle-intrinsics.texi.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211440 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Add CRC32 ACLE intrinsics testsuite.

	* gcc.target/aarch64/acle/acle.exp: New.
	* gcc.target/aarch64/acle/crc32b.c: New test.
	* gcc.target/aarch64/acle/crc32cb.c: Likewise.
	* gcc.target/aarch64/acle/crc32cd.c: Likewise.
	* gcc.target/aarch64/acle/crc32ch.c: Likewise.
	* gcc.target/aarch64/acle/crc32cw.c: Likewise.
	* gcc.target/aarch64/acle/crc32d.c: Likewise.
	* gcc.target/aarch64/acle/crc32h.c: Likewise.
	* gcc.target/aarch64/acle/crc32w.c: Likewise.
--This line,gand those below, will be ignored--

A    gcc/testsuite/gcc.target/aarch64/acle
A    gcc/testsuite/gcc.target/aarch64/acle/acle.exp
A    gcc/testsuite/gcc.target/aarch64/acle/crc32b.c
A    gcc/testsuite/gcc.target/aarch64/acle/crc32d.c
A    gcc/testsuite/gcc.target/aarch64/acle/crc32cb.c
A    gcc/testsuite/gcc.target/aarch64/acle/crc32cd.c
A    gcc/testsuite/gcc.target/aarch64/acle/crc32w.c
A    gcc/testsuite/gcc.target/aarch64/acle/crc32h.c
A    gcc/testsuite/gcc.target/aarch64/acle/crc32cw.c
A    gcc/testsuite/gcc.target/aarch64/acle/crc32ch.c
M    gcc/testsuite/ChangeLog


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211441 138bc75d-0d04-0410-961f-82ee72b054a4
2014-06-11  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm.md (*thumb1_adddi3): Move into new file thumb1.md.
	(*thumb1_addsi3): Ditto.
	(*thumb_subdi3): Ditto.
	(thumb1_subsi3_insn): Ditto.
	(*thumb_mulsi3): Ditto.
	(*thumb_mulsi3_v6): Ditto.
	(*thumb1_andsi3_insn): Ditto.
	(thumb1_bicsi3): Ditto.
	(*thumb1_iorsi3_insn): Ditto.
	(*thumb1_xorsi3_insn): Ditto.
	(*thumb1_ashlsi3): Ditto.
	(*thumb1_ashrsi3): Ditto.
	(*thumb1_lshrsi3): Ditto.
	(*thumb1_rotrsi3): Ditto.
	(*thumb1_negdi2): Ditto.
	(*thumb1_negsi2): Ditto.
	(*thumb1_abssi2): Ditto.
	(*thumb1_neg_abssi2): Ditto.
	(*thumb1_one_cmplsi2): Ditto.
	(*thumb1_zero_extendhisi2): Ditto.
	(*thumb1_zero_extendqisi2): Ditto.
	(*thumb1_zero_extendqisi2_v6): Ditto.
	(thumb1_extendhisi2): Ditto.
	(thumb1_extendqisi2): Ditto.
	(*thumb1_movdi_insn): Ditto.
	(*thumb1_movsi_insn): Ditto.
	(*thumb1_movhi_insn): Ditto.
	(thumb_movhi_clobber): Ditto.
	(*thumb1_movqi_insn): Ditto.
	(*thumb1_movhf): Ditto.
	(*thumb1_movsf_insn): Ditto.
	(*thumb_movdf_insn): Ditto.
	(movmem12b): Ditto.
	(movmem8b): Ditto.
	(cbranchqi4): Ditto.
	(cbranchsi4_insn): Ditto.
	(cbranchsi4_scratch): Ditto.
	(*negated_cbranchsi4): Ditto.
	(*tbit_cbranch): Ditto.
	(*tlobits_cbranch): Ditto.
	(*tstsi3_cbranch): Ditto.
	(*cbranchne_decr1): Ditto.
	(*addsi3_cbranch): Ditto.
	(*addsi3_cbranch_scratch): Ditto.
	(*thumb_cmpdi_zero): Ditto.
	(cstoresi_eq0_thumb1): Ditto.
	(cstoresi_ne0_thumb1): Ditto.
	(*cstoresi_eq0_thumb1_insn): Ditto.
	(*cstoresi_ne0_thumb1_insn): Ditto.
	(cstoresi_nltu_thumb1): Ditto.
	(cstoresi_ltu_thumb1): Ditto.
	(thumb1_addsi3_addgeu): Ditto.
	(*thumb_jump): Ditto.
	(*call_reg_thumb1_v5): Ditto.
	(*call_reg_thumb1): Ditto.
	(*call_value_reg_thumb1_v5): Ditto.
	(*call_value_reg_thumb1): Ditto.
	(*call_insn): Ditto.
	(*call_value_insn): Ditto.
	(thumb1_casesi_internal_pic): Ditto.
	(thumb1_casesi_dispatch): Ditto.
	(*thumb1_indirect_jump): Ditto.
	(prologue_thumb1_interwork): Ditto.
	(*epilogue_insns): Ditto.
	(consttable_1): Ditto.
	(consttable_2): Ditto.
	(tablejump): Ditto.
	(*thumb1_tablejump): Ditto.
	(thumb_eh_return): Ditto.
	(define_peephole2): Two of them are thumb1 only and got moved into
	new file thumb1.md.
	(define_split): Six of them are thumb1 only and got moved into new
	file thumb1.md.
	* config/arm/thumb1.md: New file comprised of above thumb1 only
	patterns.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211443 138bc75d-0d04-0410-961f-82ee72b054a4
[Patch, microblaze]: Add optimized lshrsi3

When barrel shifter is not present, the immediate value
is greater than #5 and optimization is -OS, the
compiler will generate shift operation using loop.

Changelog

2013-11-26  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn

ChangeLog/testsuite

2014-02-12  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test.

Signed-off-by:Nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add INIT_PRIORITY support

Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.

These macros allows users to control the order of initialization
of objects defined at namespace scope with the init_priority
attribute by specifying a relative priority, a constant integral
expression currently bounded between 101 and 65535 inclusive.

Lower numbers indicate a higher priority.

Changelog

2013-11-26  Nagaraju Mekala <nagaraju.mekala@xilinx.com>

 * gcc/config/microblaze/microblaze.c: Add microblaze_asm_constructor,
   microblaze_asm_destructor. Define TARGET_ASM_CONSTRUCTOR and
   TARGET_ASM_DESTRUCTOR.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add supervisory call support

A function can be executed in supervisory mode when a function
is declared with svc_handler attribute.

If a function with svc_handler is called, the processor switches
to supervisory mode and executes. After executing the function
it returns to normal mode.

Same feature can also be invoked with svc_table_handler attribute
but this attribute will accept a service ID, to be used for
calling the function.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Increase max alignment to please the testsuite

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Disable fivopts by default

Turn off ivopts by default. Interferes with cse.

Changelog

2013-03-18  Edgar E. Iglesias <edgar.iglesias@xilinx.com>

 * gcc/common/config/microblaze/microblaze-common.c
   (microblaze_option_optimization_table): Disable fivopts by default.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Use bralid for profiler calls

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Enable DWARF exception handling support.

Changelog

2013-03-18  Edgar E. Iglesias <edgar.iglesias@xilinx.com>
            David Holsgrove <david.holsgrove@xilinx.com>

 * common/config/microblaze/microblaze-common.c: Remove
   TARGET_EXCEPT_UNWIND_INFO definition.
 * config/microblaze/microblaze-protos.h: Add
   microblaze_eh_return prototype.
 * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register,
   microblaze_expand_epilogue, microblaze_return_addr): Handle
   calls_eh_return
   (microblaze_eh_return): New function.
 * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET,
   EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX,
   ASM_PREFERRED_EH_DATA_FORMAT
 * gcc/config/microblaze/microblaze.md: Define eh_return pattern.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Fixed missing save of r18 in fast_interrupt.

Register 18 is used as a clobber register, and must be stored when
entering a fast_interrupt. Before this fix, register 18 was only
saved if it was used directly in the interrupt function.

However, if the fast_interrupt function called a function that used
r18, the register would not be saved, and thus be mangled
upon returning from the interrupt.

Changelog

2014-02-27  Klaus Petersen <klauspetersen@gmail.com>

 * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in
   microblaze_must_save_register.

Signed-off-by: Klaus Petersen <klauspetersen@gmail.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Add MicroBlaze to check_profiling_available

Testsuite, add microblaze*-*-* target in check_profiling_available
inline with other archs setting profiling_available_saved to 0

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Add MicroBlaze pattern for dg-function-on-line

Add MicroBlaze specific pattern for checking line number and
generation of funtion in dg-function-on-line, in line with
mips method.

Changelog/testsuite

2014-02-13  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/lib/scanasm.exp (dg-function-on-line): Add
   MicroBlaze specific pattern.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Allow MicroBlaze .weakext pattern in regex match

Extend regex pattern to include optional ext at the end of
.weak to match the MicroBlaze weak label .weakext

ChangeLog/testsuite

2014-02-14  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/g++.dg/abi/rtti3.C: Extend scan-assembler
   pattern to take optional ext after .weak.
 * gcc/testsuite/g++.dg/abi/thunk4.C: Likewise.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Update MicroBlaze strings test

for new scan-assembly output resulting in use of $LC label

ChangeLog/testsuite

2014-02-14  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/gcc.target/microblaze/others/strings1.c: Update
   to include $LC label.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Add MicroBlaze to target-supports for atomic builtin tests

MicroBlaze added to supported targets for atomic builtin tests.

Changelog/testsuite

2014-02-14  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/lib/target-supports.exp: Add microblaze to
   check_effective_target_sync_int_long.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[LOCAL]: For dejagnu static testing on qemu, suppress warnings

about multiple definitions from the test function and libc in line
with method used by powerpc. Dynamic linking and using a qemu binary
which understands sysroot resolves all test failures with builtins

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[LOCAL]: Testsuite - explicitly add -fivopts for tests that depend on it

(test gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c doesnt exist in 4.6 branch)

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[LOCAL]: Quick fail g++.dg/opt/memcpy1.C

This particular testcase fails with a timeout. Instead, fail it
at compile-time for microblaze. This speeds up the testsuite without
removing it from the FAIL reports.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[LOCAL]: Testsuite - builtins tests require fpic

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>