[TASK] Export Nios II reset request port

Export CPU reset request port in MN and CN PCP subsystems. This port can
be used to reset only the Nios II processor (no peripheral reset).

Change-Id: Ic3501e8213607fd4a6806d66a09edd9210bfc797
[TASK] Revise EPCS Flash programming

- Add program-epcs.sh script that can program an EPCS flash without
  connecting to Nios II instance (no need to erase flash before).
- Add EPCS support to driver application scripts.
- Add chain and converter setting files to TERASIC DE2-115 board.

Change-Id: Ia03a2dcd211c150cdb429b8e3dca42377cfdacec
[FEATURE] Add Quartus and Qsys project for Antares Interface

- Add MN pcp subsystem
- Add 256kx16 SRAM (tri-state-bridge)
- Add openMAC for single phy
- Add EPCS ipcore for M25P16 flash
- Add PCIe
- Add 125 MHz PLL output
- Add DPRAM for common memory
- Add pipeline bridge
- Connect PCIe with SRAM via pipeline bridge
- Separate reset interconnect for PCIe and Nios II / peripherals

Change-Id: I693fab99bd3628d3f1dfef111f40259f1e73b617
[FIX] Remove JTAG cable parameter from Antares interface

Since there is only one JTAG cable necessary for using the APC2100 with
Antares interface the JTAG cable parameter can be removed from the
board.settings file.

Change-Id: I1e0f328afa1d7d087429288bd2e6aeb27b108948
[FEATURE] Add signal tap for pcp and host benchmarks

- Add 1 MHz clock for acquisition
- Add signal tap instance

Change-Id: Id25cf03286392d4dff64bd0dd08d25fcfc2cb28f
[TASK] Add Nios II reset request port to Antares interface

Change-Id: I54bbbf3fff9158ccb2320f82c4e64755b7c12280
TODO: Connect with GPIO which is controlled by host.
[TASK] Re-work dualprocshm library

- Move memory address access routine to target support module.
- Add generic macros for memory operations.
- Add macros to read/write 32 bit variables.
- Add macros to create non-cached memory.
- Add board specific memory configuration file for dualprocshm.

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[FEATURE] Add dualprocshm support files for B&R APC2100

B&R APC2100 consists x86 processor running Windows as first processor
and NIOS2 soft processor on external PCIe card as second processor.

The memory between the processors is shared over PCIe. The memory
on the PCIe card is mapped for the Windows through 2 BARs. The
dualprocshm uses BAR0 as the shared memory and BAR1 as the common
memory.

This commit adds:

- Target support header for NIOS2 and Windows.
- Target support modules for PCP daemon and PCIe interface.
- Memory configuration file for B&R Antares interface.
[FEATURE] Add NDIS Miniport library for PCIe devices

The NDIS miniport driver initializes all the hardware resources such as
memory, interrupts etc. for the specified device. It also registers
a virtual adapter with the operating system to which other protocol
drivers like TCP/IP can bind with.
[FIX] Add 4 byte packing for Windows and 8 byte pointer variables

- Update pointer variables to use fixed 8 byte size. This avoids
  issues with different pointer sizes on 32 bit and 64 bit systems.
- Add compiler options for Windows to use fixed 4 byte packing for
  shared structures with 8 byte variables.

NOTE: This is a workaround commit to avoid issues with 64 bit Windows

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[TASK] Add support for Windows kernel in stack

- Add Windows kernel target definitions header and target module.
- Add driver header and update driver.h to support windows kernel.

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[FEATURE] Add driver project for Windows PCIe solution

This driver uses dualprocshm, ndislib and circbuf libraries to
create the communication interface between user application running
in Windows user space and kernel stack running on a softcore
NIOS2 processor on an external PCIe device.

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[TASK] Add MN dual processor library support for NIOS2 processor

- Add library settings for dual processor CAL.
- Update stackfiles.settings to include CAL modules for dual processor.

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[TASK] Add windows lock module to support PCIe

- Add PCIe specific locking macros in target definition.
- Add dual processor lock module for Windows user space.

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[FEATURE] Add user CAL modules for PCIe interface

The CAL uses Windows IOCTLs to interact with the Windows driver.
The Windows driver is responsible for all communication to the PCIe
device.
[FEATURE] Add user library for PCIe interface

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[TASK] Update Altera NIOS2 daemon build to include dualprocshm library

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[TASK] Add synchronization thread for Windows

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>
[TASK] Update console demo to support PCIe interface on Windows

Signed-off-by: Gaurav Kumar Singh <gaurav@kalycito.com>