ARM: dts: msm: Add L2 perf monitor interrupts to bypass list
Corrected L2 perf monitor interrupt name to APCC_qgicL2PerfMonIrptReq in the list. The L2 perf monitor interrupts can only come when the CPU subsystem is active and powered on. So, put it in the bypass list so that XO shutdown is not blocked to allow processing this interrupt when the CPU subsystem is power collapsed. Change-Id: I1ae4dc9e800ac2d7188d45ef7634530d93049340 Signed-off-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Girish Ghongdemath <girishsg@codeaurora.org>

Signed-off-by: evolutionmod <kernelcraft@gmail.com>