arm: shmobile: r8a7790: add USB3.0 clocks to device tree

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 843afed89cb38a4b2deea583c531ee94c5546b85)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arm: shmobile: r8a7791: add USB3.0 clocks to device tree

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a91dc766cbee8c8ed89e125c607729f0b0d61129)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7791 dtsi: add SYS-DMAC clocks

Add clocks for the SYS-DMAC0 and SYS-DMAC1 hardware blocks.

Cfr. the r8a7790 version by Ben Dooks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 28efa9669710113f62342708764b19ddf0165774)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: lager: Add VDD MPU regulator for DVFS

The CA15 cluster is capable of voltage scaling. Add the regulator
in the i2c3 node, to allow the generic CPUFreq driver to use it.

Enable the i2c3 pin mux and the device node as well since the
da9210 is connected to that bus.

Note: In R-CAR Gen2, each frequency is using the same voltage,
and DVS control is not used. Therefore, this patch set the
voltage(Vmin/Vmax) to 1000mv.

Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
[gaku.inami.xw@bp.renesas.com: Changes Vmin for disabling DVS]
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

(cherry picked from commit 402ebb4040c84652dddcce53fa285d6611f2fc5c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Conflicts:
	arch/arm/boot/dts/r8a7790-lager.dts
ARM: shmobile: r8a7790/lager dts: Add DVFS parameters into cpu0 node for r8a7790

Add needed information inside CPU0 for the generic cpufreq-cpu0 driver.

- voltage-tolerance = 1%
  It reflects the tolerance for the CPU voltage defined inside the OPP
  table. Due to the lack of proper OPP definition, use an arbitrary safe
  value.
- clock-latency = 300 us
  Approximate worst-case latency to do a full DVFS transition for every
  OPPs. Due to the lack of HW information, use an arbitrary safe value.
  Note: The term transition-latency will be more accurate to define this
  value since the clock transition latency is not the only parameter that
  will define the overall DVFS transition.
- operating-points = < kHz - uV >
  List of 6 operating points. All of them are using the same voltage
  since the valid Vmin voltage is not documented in the HW spec.
- clocks
  phandle to the CPU clock source. This clock source is used for all the
  4 CortexA15 located inside the same cluster.

Signed-off-by: Benoit Cousson <bcousson+renesas@baylibre.com>
[gaku.inami.xw@bp.renesas.com: Change the setting of OPPs for ES2.0]
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

(cherry picked from commit c4247ccc1086395c62b07eac30a0b88a5324cb4f)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: add cpufreq-cpu0 driver for common SH-Mobile

I add a new file(cpufreq.c) for the following reasons.
- Registration of platform_device must be unified in SH-Mobile.
- We can't create a node of cpufreq drivers into device tree.
  (Because cpufreq driver is virtual device.)

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 06fc14649499dbf61807ea869ecd575c40da35f1)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: koelsch dts: Add VDD MPU regulator for DVFS

The CA15 cluster is capable of voltage scaling. Add the regulator
in the i2c6 node, to allow the generic CPUFreq driver to use it.

Enable the i2c6 pin mux and the device node as well since the
da9210 is connected to that bus.

Note: In R-CAR Gen2, each frequency is using the same voltage,
and DVS control is not used. Therefore, this patch set the
voltage(Vmin/Vmax) to 1000mv.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 05e234a187058ee659282baf14168adbbcac5b9b)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Conflicts:
	arch/arm/boot/dts/r8a7791-koelsch.dts
ARM: shmobile: r8a7791/koelsch dts: Add DVFS parameters into cpu0 node for r8a7791

Add needed information inside CPU0 for the generic cpufreq-cpu0 driver.

- voltage-tolerance = 1%
  It reflects the tolerance for the CPU voltage defined inside the OPP
  table. Due to the lack of proper OPP definition, use an arbitrary safe
  value.
- clock-latency = 300 us
  Approximate worst-case latency to do a full DVFS transition for every
  OPPs. Due to the lack of HW information, use an arbitrary safe value.
  Note: The term transition-latency will be more accurate to define this
  value since the clock transition latency is not the only parameter that
  will define the overall DVFS transition.
- operating-points = < kHz - uV >
  List of 6 operating points. All of them are using the same voltage
  since DVS is not supported in R-CAR Gen2.
- clocks
  phandle to the CPU clock source. This clock source is used for all the
  2 CortexA15 located inside the same cluster.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 7533a3da5fe4d8a0870d3bd8f7a9c37db5d22393)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Enable CPUFREQ configuration

This changes of configuration is multiplatform build only for r8a7790/r8a7791.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 4360adecdce507cb5e2855b3b932b40e10ff4acc)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: lager: enable i2c devices

Add i2c0, i2c1, i2c2 and i2c3 nodes to the Lager reference device tree as
these busses all have devices on them that can be probed even if they
are no drivers yet.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[horms+renesas@verge.net.au: Added shmobile to title]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

(cherry picked from commit 15be406cc4690f1f4a4bbfdccb7c849ed572b855)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: lager: add i2c1, i2c2 pins

Add pinctrl definitions for i2c1 and i2c2 busses on the Lager board
to ensure these are setup correctly at initialisation time. The i2c0
and i2c3 busses are connected to single function pins.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[horms+renesas@verge.net.au: Added shmobile to patch title]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

(cherry picked from commit df40f256b18300e14fe0d7dcf2b64ce07ef06045)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Mark all SoCs in shmobile as CPUFreq, capable

Mark all SoCs in shmobile as CPUFreq capable
on multiplatform build only.

Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
[gaku.inami.xw@bp.renesas.com: Move the definition of cpufreq capable]
Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

(cherry picked from commit 05bdfc26c9cd0de25ea8bb5a629d2ca9ae04a92c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Conflicts:
	arch/arm/mach-shmobile/Kconfig
ARM: shmobile: lager: Move i2c[12]_pins nodes to pfc node

Due to an error when resolving conflicts df40f256b18300e1 ("ARM: shmobile:
lager: add i2c1, i2c2 pins") added the i2c[12]_pins nodes to the wrong
node.

This patch moves them to their correct location in the pfc node.

Cc: Ben Dooks <ben.dooks@codethink.co.uk>
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit f1a36fc855b7b2a04793f465cc9a2745ae3fb9d5)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Conflicts:
	arch/arm/boot/dts/r8a7790-lager.dts
ARM: shmobile: Update EMEV2 DTS to include CPU frequency

Add CPU Frequency information to the EMEV2 DTS file. This
will allow us to use the shared C code to on EMEV2 which
reads out the clock frequency from DT and calculates the
delay settings from there.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 2fd2909bbbcb3a7594e56adb3bb0cbd502201eca)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Use shmobile_init_delay() on EMEV2

Adjust EMEV2 to use shmobile_init_delay() together with
CPU Frequency settings from the DTS.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 5363d2f33c7b6fe900c437a37927c59466bb0114)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Get rid of redundant EMEV2 mach callbacks

Update the EMEV2 specific SoC callbacks to get rid
of the calls to of_clk_init() and of_platform_populate().
Those calls are by default executed by the functions in
the shared ARM code in case the SoC specific mach
callbacks are NULL.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 3795d5238aea79fcf00858c1915123646cd963dc)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Lager memory map update

Update the Lager DTS to make use of the new unified legacy
memory map where the legacy window on Lager and Koelsch
have the same size.

With this change in place the code gets aligned with the
documentation.

After update the Lager board has the following map:
Bank0: 1GiB RAM (Legacy 32-bit: 0x40000000->0x7fffffff)
Bank1: 3GiB RAM (LPAE area: 0x140000000->0x1ffffffff)

Before the update the old map looked like this:
Bank0: 2GiB RAM (Legacy 32-bit: 0x40000000->0xbfffffff)
Bank1: 2GiB RAM (LPAE area: 0x180000000->0x1ffffffff)

Tested with and without LPAE on r8a7790 Lager.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit e4d68f3941fa639e3502044322042586684f90d4)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Update r7s72100 DTS to include CPU frequency

Add CPU Frequency information to the r7s72100 DTS file. This
will allow us to use the shared C code on r7s72100 and Genmai
which reads out the clock frequency from DT and calculates the
delay settings from there.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit ad989b1b78ba54bcea70a8ca6e3908476404d8e9)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Use shmobile_init_delay() on Genmai boards

Adjust Genmai board support to use shmobile_init_delay() together
with r7s72100 CPU Frequency settings from the DTS.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a1848ea27f7d4b23a1aa7b3b55c1faca80fdac34)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: Use shmobile_init_delay() on r7s72100

Adjust the r7s72100 SoC support code to use shmobile_init_delay()
together with CPU Frequency settings from the DTS. Get rid of the
C code version.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 0855aedb5558234bac836bd254b1967cd4dd5739)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>