ARM: mm: Remove unnecessary CMO in Cortex A15 startup

Cortex-A15 flush L2 cache after reset, there is no need to do this
in software, if L2 is already invalidated in bootloader and
cache is disabled. For secondary startup, there is no reason to
flush L2 as well.

This change assumes the setup code is always entered as the result
of CPU reset.

Change-Id: I6d58f8b4a638b70acfb35b97c87a09266aceef41
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/170563
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
ARM: mm: Skip I-cache invalidate for Cortex-A15 boot

This is not required since cache is invalidated by HW in the reset
sequence. Bootloader is supposed to do the same before it hands
over control to kernel.

Change-Id: I0991de3ba1015a32f2c49a0333fd0b17a51a4f31
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/197028
(cherry picked from commit 9c49ffd08d6da03caa820711db83f561d9333aee)
Reviewed-on: http://git-master/r/200854
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: mm: enable non-cacheable streaming enhancement

This is cortex-a15 specific

bug 1178938

Change-Id: Id695d89dbe1411d277f2c1296c74586ca9c1584e
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/164168
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
ARM: mm: Enable NCSE feature for A15 only

Change-Id: If966ee69f1d5e4314f79685238ecff3c44eadac0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/167879
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>