Fix typo introduced to the serial driver when the DBGU driver was added
SAMA5 DBGU:  Add logic to suppress DBGU reconfiguration when started from a bootloader
Updated comments and README
sscanf:  Use stroul() vs strol() for %u format.  From kfrolov
SAMA5:  When running from SRAM, vectors must lie in ISRAM
SAMA5: Make sure the MMU and caches are disabled on power up; flush the vector region D-Cache after copying interrupt vectors; make sure that D-Cache, I-Cache, and TLBs are invalidated after modifying the AXI MATRIX remapping
If LOWVECTORS is selected, then we need to clear the VBAR register.  A bootloader may have left the VBAR in an bad state
SAMA5:  When booting from SDRAM, don't copy vectors to ISRAM.  Instread just set the VBAR register to add address of the vectors in SDRAM
SAMA5:  Cosmetic updates to comments and README files
SAMA5 NOR boot: Use a static memory variable to determine if/when we boot to NOR FLASH
Updated NOR boot logic from David Sidrane
ARMv7-A: Typo fix from David Sidrane
SAMA5:  Fix SAMA5 so that interpretation of BMS bit is correct.  From David Sidrane
SAMA5: On some hardware, reconfiguring the PLL while executing out of NOR FLASH causes crashes.  This was fixed by David Sidrane by implementing RAM functions. The killer code is copied and executed from ISRAM and the crash is avoided.
SAMA5D3 Xplained: Delay loop calibrated
SAMA5 boards:  Add set up for 528MHz CPU clock
Fix a build error when only USB device tracing is enabled (from David Sidrane).  Also an update to the USB tracing document
SAMA5: Update from David Sidrane to last RAM function change:  Apparently inline functions need to placed into the same RAM section, or they do not get inlined.  From David Sidrane
SAMA5 boards:  Refresh all configuration files
SAMA5 boards: Operation at 528Mhz has been verified