SCIF header file and IOCTL interface

This patch introduces the SCIF documentation in the header file
and describes the IOCTL interace for user mode. mic_overview.txt
is updated with documentation on SCIF and a new document
describing SCIF in more details is available in scif_overview.txt.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
SCIF ring buffer infrastructure

The SCIF ring buffer is a byte stream ring buffer optimized for
avoiding reads across the PCIe bus. It is used by the SCIF driver
internally for exchanging control messages in kernel mode. It is
also used between the user and kernel mode SCIF endpoints to
exchange short control messages.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
SCIF Hardware Bus

The SCIF hardware bus abstracts the low level hardware driver details
like interrupts, memory bar and the DMA filter function so that the
same SCIF driver can work without any changes with the MIC host or
card driver as long as the hardware bus operations are implemented.
The SCIF hardware device is registered by the host and card drivers
on the SCIF hardware bus resulting in probing the SCIF driver.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
SCIF Peer Bus

The SCIF peer bus is used to register and unregister SCIF peer
devices internally by the SCIF driver to signify the addition
and removal of peer nodes respectively from the SCIF network.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
Common MIC header file changes in preparation for SCIF

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
SCIF module initialization

SCIF module initialization, mapping APIs and debugfs hooks.
SCIF gets probed by the SCIF hardware bus if SCIF devices
were registered by base drivers. A MISC device is registered
to provide the SCIF character device interface.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
SCIF node queue pair setup management

SCIF node queue pair setup sets up the kernel mode private node
queue pairs between all the nodes to enable internal control
message communication once SCIF gets probed by the SCIF
hardware bus if SCIF devices were registered.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
SCIF open close bind and listen APIs

SCIF character device file operations for opening and closing a
user or kernel mode SCIF endpoint. This patch also enables IOCTL's
and kernel mode APIs for binding to a SCIF port and listening for
incoming SCIF connections.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
SCIF connections APIs i.e. accept and connect

SCIF connection APIs which establish a SCIF connection between
a pair of SCIF endpoints. The SCIF endpoints must be in connected
state to exchange control messages, register memory, map remote
memory and trigger DMA transfers. SCIF connections can be set
up asynchronously or synchronously.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
SCIF messaging and node enumeration APIs

SCIF messaging APIs which allow sending control messages between
the SCIF endpoints via a byte stream based ring buffer which has
been optimized to avoid reads across PCIe. The SCIF messaging APIs
are typically used for short < 1024 byte control messages for best
performance while the RDMA APIs which will be submitted in a future
patch series is recommended for larger transfers. The node
enumeration API enables a user to query for the number of nodes
online in the SCIF network and their node ids.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
MIC host driver specific changes to enable SCIF

MIC host driver specific changes to enable SCIF. This patch implements
the SCIF hardware bus operations and registers a SCIF device on the
SCIF hardware bus.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
MIC card driver specific changes to enable SCIF

MIC card driver specific changes to enable SCIF. This patch implements
the SCIF hardware bus operations and registers a SCIF device on the
SCIF hardware bus.

Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>