Primitive port and node construction

I would like to submit this pull request for review, knowing that I am not done with it yet. There is a lot of code here, but finishing all of the features I have marked as TODO in the code would result in a PR of several thousand lines, and this is bad enough already. 

* Yes, this finally gets rid of the old digital circuit primitive definitions. Those are going to be gone permanently after this, because **we can now define port types and node types in the frontend language.**
* This also removes all of the old "functionality" of `ExpressionGraph`, which made horrible assumptions about the structure of the schematic that was being compiled and wouldn't work for anything except digital circuits.
* `TypeChecker` is completely gone. All typing can be done **dynamically through the expression graph**, which has all the benefits of a static system while providing dynamic typing only where it is actually used.
* Test coverage is down quite a bit, but I plan to add some test cases to this branch after it is reviewed and hopefully get the coverage even higher than it is now.
* There are many TODOs hanging around in the code. Some of them are easy enough to resolve before this is merged; some of them are large enough to merit opening a separate issue.
nit: the copy is unnecessary right? if it's already a newly allocated list?