designed serializer, and working on cyclic dac.

Broke the SH for now, working on getting rtr ota up and running, since
SH can't swing between vdd and gnd like it should.
Merge branch 'master' of https://github.com/agleason6/ECE6414_master
merge conflicts with BMR

Conflicts:
	ST_beta_mult_ref/schematic/data.dm
	ST_beta_mult_ref/schematic/sch.oa
	ST_beta_mult_ref/schematic/thumbnail_128x128.png