tooling: Add include dependency checker for header files

This script checks is all dependencies of a header file are fulfilled so
that the header can be included stand-alone.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
configs: Adjust QEMU config to changes in AHCI model

The cap location was adjusted to comply with the spec.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make CS segment switching more generic

Original set_cs() implementation relied on rex64/ljmp instruction. However,
AMD64 doesn't support 64-bit offsets in far jump (there is no rex-prefixed
version), and the offset used by Jailhouse is more than 32-bit long.

An alternative method that relies on lretq is used to switch CS now. It is
known to work both on Intel and AMD.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Do not hardcode RIP position on Linux stack

On guest mode entry, linux_ip is always NUM_ENTRY_REGS * 8 bytes from linux_sp,
not 6 bytes.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Introduce realmode_paging structures

Real mode certainly has no paging, but having these structures in place make
guest memory access more uniform. Future AMD code will need to read guest
instructions for cells running in real mode.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Rename VMX/VTD public functions

In preparation to support different vendor-specific implementations for
virtualization features, public functions for VMX/VTD were renamed.
"vmx_" and "vtd_" prefixes are now superseded with "vcpu_" and "iommu_",
and new header files were introduced to hold the declarations.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Move vmx_vmexit to vmx-vmexit.S

entry.S was split between vendor-neutral code (arch_entry, interrupt handlers),
and vendor-specific code for handling VM exists. This helps to avoid #ifdefs later,
when SVM entry point will be introduced.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Untie APIC code from VMX implementation

Removed direct references to VMX functions from the APIC code,
which is generic by its design. NMI handlers are now defined in
corresponding vendor-specific code (presently, only vmx.c), and
resolved at the link time.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Introduce iommu_cell_emulates_ir()

As ir_emulation flag is defined in VTD-specific part of struct cell,
a wrapper function was added to access it in the uniform manner.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Switchable guest code access for mmio_parse()

mmio_parse() and related infrastructure use link-time resolved (rather
than hardcoded) static function to access guest memory. This way,
vendor-specific code can provide an accelerated implementation if available.

map_code_page() helper routine is now superseded by vcpu_get_inst_bytes() with
different call semantics. The function returns a pointer to the first byte
available and accepts the number of bytes to map (or otherwise make available)
to the hypervisor. It can adjust this value (it is now done to save an
unnecessary page table walk) as described inside the commit.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make vcpu_skip_emulated_instruction() public

In preparation for vmx.c refactoring, vmx_skip_emulated_instruction() was
renamed to vcpu_skip_emulated_instruction() and made non-static.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make vcpu_get_guest_paging_structs() public

Similarly, vmx_get_guest_paging_structs() was renamed to
vcpu_get_guest_paging_structs() and made non-static.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Refactor generic bits of vcpu_cell_{init,exit}

vcpu_cell_init() and vcpu_cell_exit() functions contain some code that is
the same regardless virtualization technology used. So they were moved to
the newly-introduced vcpu.c, calling vcpu_vendor_cell_init() and
vcpu_vendor_cell_exit() for vendor-specific actions.

This also implies introducing the first data abstraction structure, and the
first vendor-specific data wrapper function: vcpu_vendor_get_cell_io_bitmap().
More to follow.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make vcpu_handle_hypercall() generic

Hypercall handling code can now be used for any vendor.
This implies implementing accessor to EFER, RFLAGS, CS and RIP,
(commonly referred to as "execution state") and also making
vcpu_deactivate_vmm() non-static.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make vcpu_handle_io_access() generic

I/O VM exit handling code can now be used for any vendor.
This implies introducing struct vcpu_io_intercept to communicate
intercepted instruction properties like the port number and access
size between vendor-specific and generic code.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make vcpu_handle_pt_violation() generic

Finally, page fault handling in guests was generalized and can now
be called for any vendor. To communicate page fault details between
vendor-specific and generic code, struct vcpu_pf_intercept was introduced,
and vcpu_get_guest_paging_structures() was made public (i.e. non-static).

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Keep IOAPIC entries consistent when unmasked

When an IOAPIC redirection entry is masked, only lower half of the register
is written. This causes the upper half to contain stale data when the entry
is unmasked. On systems that don't do interrupt remapping (currently, QEMU
and AMD) this may result in interrupts being lost or delivered to the wrong
destination.

Fix this by unconditionally writing the upper half of the register when
it is unmasked.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: rename per_cpu variable flush_virt_caches to flush_vcpu_caches

Also changed the comment to hopefully better reflect what the variable
is used for.

Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
control: add a control function to flush vcpu caches of a whole cell

When having to unmap memory while a cell is running we need a way to
flush its tlbs. Adding a function to do just that.

Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: control: use arch_flush_cell_vcpu_caches in arch_config_commit

Use the new function also in arch_config_commit to get that function
more compact.

Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>