Merge remote-tracking branch 'upstream/master'
Merge remote-tracking branch 'upstream/master'
[x86] Virtualize EFLAGS.IF and handle physical interrupts.

o Do a VMEXIT on physical interrupt.
o Virtualize EFLAGS.IF so that non-maskable interrupts
  are not held by guests.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[emulators] Minor beautification change in MC416818 emulator.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[EMULATORS] i8259 PIC Emulator

This is first cut implemenation of i8259a compatible PIC
emulator.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Enable and Use i8259a PIC emulator for guest.

This patch enables the i8259a compatible PIC emulator. All required
wiring is added.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Handle VM Exit in exception like ARM

Xvisor by design handles VM EXIT as part of exception.
It assumes that VM EXIT causes an exception. To fit
in that world, we use the software interrupt method
to induce a fake exception. Complete VM EXIT is
handled while in that exception handler.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[EMULATORS] Add Legacy Intel 8254 PIT

Add Intel's 8254/8253 compatilbe programmable interrupt
timer.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Enable i8254 PIT for x86 Guests.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Beautification changes in VCPU regdump

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Various beautification changes in x86

o Move a lot of prints from verbose to debug.
o Made the vcpu dump state pretty.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Dump guest VCPU regs from VMCB when saved by hardware.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[ARM] arm64: Trap data cache operation by set/way

On SMP host, just upgrading data cache set/way
operations to clean+invalidate operations won't
suffice.

If a VCPU is preempted while it was doing
clean/invalidate/clean+invalidate by set/way
on host CPU A and resumed on host CPU B then
effects of set/way operations will not be
correctly seen by all host CPUs. To take care
of this clean/clean+invalidate entire data cache
by set/way when such a VCPU is resumed on another
host CPU.

This approach is very similar to what we already
for set/way operations on arm32ve port.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Updating the character device API.

As the offset is needed for most of character devices, an offset pointer have
been added to the read and write operations. The character device
implementation is in charge of using and updating it if necessary.

The argument for the IO control has been updated to match Linux's.

Cc: Jimmy Durand Wesolowski <jimmy.durand-wesolowski@openwide.fr>
Signed-off-by: Jimmy Durand Wesolowski <jimmy.durand.wesolowski@gmail.com>
[DRIVERS] Serial drivers updated to use the new chardev API.

Serial driver read and write operations now take an unused argument, an
operation offset pointer, to match the new chardev API.

Cc: Jimmy Durand Wesolowski <jimmy.durand-wesolowski@openwide.fr>
Signed-off-by: Jimmy Durand Wesolowski <jimmy.durand.wesolowski@gmail.com>
[ARM] mmu_lpae: Implement arch_cpu_aspace_memory_xxx() APIs

This patch implements arch_cpu_aspace_memory_xxx() for LPAE MMU
to improve host physical read/write() performance of arm32ve
and arm64 ports.

With this patch, the ping delay is reduced by 0.1 ms on ARM
fast models and Foundation v8 model.

Signed-off-by: Anup Patel <anup@brainfault.org>
[EMULATORS] Add LAPIC emulators for Intel Systems.

SIPI and other SMP facilities are not supported yet.
LAPIC uses vector 16 to receive interrupts from
IOAPIC or 8259 Controller.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Add support to use LAPIC for x86

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Beautification changes for Guest register dump.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Avoid adding MEM-IO regions as RAM.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>